ask lcd
-------
model: 642R
guessed res: 640x200

inside:
-------
2 x 8 x oki m5279 6x26	--	640 columns
2 x oki m5278 6x01	--	200 (?) rows
1 x 74hc86d		--	xor unit
1x hc393		--	dual(!) 4-stage binary counter
guessed: - 4 bit parallel chip enable method for data transfer
         - ftn - fem technology (wtf?)

pinout:
-------
nc	nc	-- cable
nc	nc
dul0	dul1	-- board	| data input (upper half)
dul2	dul3			| 	"
dll0	dll1			| data input (lower half)
dll2	dll3			|	"
load	frmb			| latch shift register content + switch row - *
cp	eclk			| 4bit shift - switch to next msm unit (1/20 cp)
frp	vss			| ** - gnd
vdd	vee			| supply voltage (5v) - vee via res. on vcc (?)	

*)	alternate signal input (df pin)
**)	switch upper/lower half (?) (io1 pin) 

similar:
--------
http://www.allelectronics.com/spec/LCD-104.pdf

my progress:
------------
board investigations:
- 5279 load ~ 5278 cp
- frp ~ 5278(1) io1 , 5278(1) io64 ~ 5278(2) io1
- frmb xor(by 74hc86d) 1q0 (hc393) -> df (527*)
- hc393 2cp ~ 5279 load
- hc393 [1,2]mr ~ vss => count on falling edge of [1,2]cp
- hc393 2q3 ~ hc393 1cp (luckily i was stoned and figured it out!)
- 1q0 = 2nd xor argument

  [cut]
  => 2q3 : llllllllhhhhhhhh => 1 count per 16 = 4x4 bits
  => 1q0 : switches from l to high every 16 loads (?)
           (i dont understand that! this gets xored with frmb.
            count of 64 would be still strange but look better.)

  :-D
[to be continued]