1 /***********************************************************************
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3 * lpc2xxx.h: Header file for Philips LPC2xxx series
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5 ***********************************************************************/
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10 /* External Memory Controller (EMC) */
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11 #define BCFG0 (*((volatile unsigned long *) 0xFFE00000))
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12 #define BCFG1 (*((volatile unsigned long *) 0xFFE00004))
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13 #define BCFG2 (*((volatile unsigned long *) 0xFFE00008))
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14 #define BCFG3 (*((volatile unsigned long *) 0xFFE0000C))
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16 /* Vectored Interrupt Controller (VIC) */
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17 #define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000))
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18 #define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004))
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19 #define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008))
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20 #define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C))
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21 #define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010))
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22 #define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014))
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23 #define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018))
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24 #define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C))
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25 #define VICProtection (*((volatile unsigned long *) 0xFFFFF020))
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26 #define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030))
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27 #define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034))
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28 #define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100))
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29 #define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104))
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30 #define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108))
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31 #define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C))
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32 #define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110))
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33 #define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114))
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34 #define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118))
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35 #define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C))
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36 #define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120))
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37 #define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124))
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38 #define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128))
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39 #define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C))
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40 #define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130))
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41 #define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134))
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42 #define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138))
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43 #define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C))
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44 #define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200))
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45 #define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204))
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46 #define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208))
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47 #define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C))
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48 #define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210))
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49 #define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214))
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50 #define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218))
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51 #define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C))
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52 #define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220))
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53 #define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224))
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54 #define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228))
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55 #define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C))
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56 #define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230))
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57 #define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234))
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58 #define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238))
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59 #define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C))
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61 /* Pin Connect Block */
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62 #define PINSEL0 (*((volatile unsigned long *) 0xE002C000))
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63 #define PINSEL1 (*((volatile unsigned long *) 0xE002C004))
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64 #define PINSEL2 (*((volatile unsigned long *) 0xE002C014))
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66 /* General Purpose Input/Output (GPIO) */
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67 #define IOPIN (*((volatile unsigned long *) 0xE0028000))
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68 #define IOSET (*((volatile unsigned long *) 0xE0028004))
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69 #define IODIR (*((volatile unsigned long *) 0xE0028008))
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70 #define IOCLR (*((volatile unsigned long *) 0xE002800C))
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72 #define IOPIN0 (*((volatile unsigned long *) 0xE0028000))
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73 #define IOSET0 (*((volatile unsigned long *) 0xE0028004))
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74 #define IODIR0 (*((volatile unsigned long *) 0xE0028008))
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75 #define IOCLR0 (*((volatile unsigned long *) 0xE002800C))
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76 #define IOPIN1 (*((volatile unsigned long *) 0xE0028010))
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77 #define IOSET1 (*((volatile unsigned long *) 0xE0028014))
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78 #define IODIR1 (*((volatile unsigned long *) 0xE0028018))
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79 #define IOCLR1 (*((volatile unsigned long *) 0xE002801C))
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80 #define IOPIN2 (*((volatile unsigned long *) 0xE0028020))
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81 #define IOSET2 (*((volatile unsigned long *) 0xE0028024))
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82 #define IODIR2 (*((volatile unsigned long *) 0xE0028028))
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83 #define IOCLR2 (*((volatile unsigned long *) 0xE002802C))
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84 #define IOPIN3 (*((volatile unsigned long *) 0xE0028030))
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85 #define IOSET3 (*((volatile unsigned long *) 0xE0028034))
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86 #define IODIR3 (*((volatile unsigned long *) 0xE0028038))
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87 #define IOCLR3 (*((volatile unsigned long *) 0xE002803C))
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89 /* Fast I/O setup */
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90 #define FIO_BASE_ADDR 0x3FFFC000
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91 #define FIO0DIR (*((volatile unsigned long *) 0x3FFFC000))
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92 #define FIO0MASK (*((volatile unsigned long *) 0x3FFFC010))
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93 #define FIO0PIN (*((volatile unsigned long *) 0x3FFFC014))
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94 #define FIO0SET (*((volatile unsigned long *) 0x3FFFC018))
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95 #define FIO0CLR (*((volatile unsigned long *) 0x3FFFC01C))
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96 #define FIO1DIR (*((volatile unsigned long *) 0x3FFFC020))
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97 #define FIO1MASK (*((volatile unsigned long *) 0x3FFFC030))
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98 #define FIO1PIN (*((volatile unsigned long *) 0x3FFFC034))
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99 #define FIO1SET (*((volatile unsigned long *) 0x3FFFC038))
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100 #define FIO1CLR (*((volatile unsigned long *) 0x3FFFC03C))
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102 /* Memory Accelerator Module (MAM) */
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103 #define MAMCR (*((volatile unsigned long *) 0xE01FC000))
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104 #define MAMTIM (*((volatile unsigned long *) 0xE01FC004))
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106 /* Memory Mapping control register */
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107 #define MEMMAP (*((volatile unsigned long *) 0xE01FC040))
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109 /* Phase Locked Loop (PLL) */
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110 #define PLLCON (*((volatile unsigned long *) 0xE01FC080))
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111 #define PLLCFG (*((volatile unsigned long *) 0xE01FC084))
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112 #define PLLSTAT (*((volatile unsigned long *) 0xE01FC088))
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113 #define PLLFEED (*((volatile unsigned long *) 0xE01FC08C))
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115 /* PLL48 Registers */
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116 #define PLL48CON (*((volatile unsigned long *) 0xE01FC0A0))
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117 #define PLL48CFG (*((volatile unsigned long *) 0xE01FC0A4))
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118 #define PLL48STAT (*((volatile unsigned long *) 0xE01FC0A8))
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119 #define PLL48FEED (*((volatile unsigned long *) 0xE01FC0AC))
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121 /* Power Control */
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122 #define PCON (*((volatile unsigned long *) 0xE01FC0C0))
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123 #define PCONP (*((volatile unsigned long *) 0xE01FC0C4))
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126 #define VPBDIV (*((volatile unsigned long *) 0xE01FC100))
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128 /* External Interrupts */
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129 #define EXTINT (*((volatile unsigned long *) 0xE01FC140))
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130 #define EXTWAKE (*((volatile unsigned long *) 0xE01FC144))
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131 #define EXTMODE (*((volatile unsigned long *) 0xE01FC148))
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132 #define EXTPOLAR (*((volatile unsigned long *) 0xE01FC14C))
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135 #define RSIR (*((volatile unsigned long *) 0xE01FC180))
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137 /* System Controls and Status */
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138 #define SCS (*((volatile unsigned long *) 0xE01FC1A0))
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141 #define TIMER0_IR (*((volatile unsigned long *) 0xE0004000))
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142 #define TIMER0_TCR (*((volatile unsigned long *) 0xE0004004))
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143 #define TIMER0_TC (*((volatile unsigned long *) 0xE0004008))
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144 #define TIMER0_PR (*((volatile unsigned long *) 0xE000400C))
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145 #define TIMER0_PC (*((volatile unsigned long *) 0xE0004010))
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146 #define TIMER0_MCR (*((volatile unsigned long *) 0xE0004014))
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147 #define TIMER0_MR0 (*((volatile unsigned long *) 0xE0004018))
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148 #define TIMER0_MR1 (*((volatile unsigned long *) 0xE000401C))
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149 #define TIMER0_MR2 (*((volatile unsigned long *) 0xE0004020))
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150 #define TIMER0_MR3 (*((volatile unsigned long *) 0xE0004024))
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151 #define TIMER0_CCR (*((volatile unsigned long *) 0xE0004028))
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152 #define TIMER0_CR0 (*((volatile unsigned long *) 0xE000402C))
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153 #define TIMER0_CR1 (*((volatile unsigned long *) 0xE0004030))
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154 #define TIMER0_CR2 (*((volatile unsigned long *) 0xE0004034))
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155 #define TIMER0_CR3 (*((volatile unsigned long *) 0xE0004038))
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156 #define TIMER0_EMR (*((volatile unsigned long *) 0xE000403C))
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157 #define TIMER0_CTCR (*((volatile unsigned long *) 0xE0004070))
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159 #define T0IR (*((volatile unsigned long *) 0xE0004000))
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160 #define T0TCR (*((volatile unsigned long *) 0xE0004004))
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161 #define T0TC (*((volatile unsigned long *) 0xE0004008))
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162 #define T0PR (*((volatile unsigned long *) 0xE000400C))
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163 #define T0PC (*((volatile unsigned long *) 0xE0004010))
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164 #define T0MCR (*((volatile unsigned long *) 0xE0004014))
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165 #define T0MR0 (*((volatile unsigned long *) 0xE0004018))
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166 #define T0MR1 (*((volatile unsigned long *) 0xE000401C))
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167 #define T0MR2 (*((volatile unsigned long *) 0xE0004020))
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168 #define T0MR3 (*((volatile unsigned long *) 0xE0004024))
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169 #define T0CCR (*((volatile unsigned long *) 0xE0004028))
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170 #define T0CR0 (*((volatile unsigned long *) 0xE000402C))
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171 #define T0CR1 (*((volatile unsigned long *) 0xE0004030))
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172 #define T0CR2 (*((volatile unsigned long *) 0xE0004034))
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173 #define T0CR3 (*((volatile unsigned long *) 0xE0004038))
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174 #define T0EMR (*((volatile unsigned long *) 0xE000403C))
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175 #define T0CTCR (*((volatile unsigned long *) 0xE0004070))
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178 #define TIMER1_IR (*((volatile unsigned long *) 0xE0008000))
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179 #define TIMER1_TCR (*((volatile unsigned long *) 0xE0008004))
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180 #define TIMER1_TC (*((volatile unsigned long *) 0xE0008008))
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181 #define TIMER1_PR (*((volatile unsigned long *) 0xE000800C))
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182 #define TIMER1_PC (*((volatile unsigned long *) 0xE0008010))
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183 #define TIMER1_MCR (*((volatile unsigned long *) 0xE0008014))
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184 #define TIMER1_MR0 (*((volatile unsigned long *) 0xE0008018))
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185 #define TIMER1_MR1 (*((volatile unsigned long *) 0xE000801C))
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186 #define TIMER1_MR2 (*((volatile unsigned long *) 0xE0008020))
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187 #define TIMER1_MR3 (*((volatile unsigned long *) 0xE0008024))
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188 #define TIMER1_CCR (*((volatile unsigned long *) 0xE0008028))
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189 #define TIMER1_CR0 (*((volatile unsigned long *) 0xE000802C))
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190 #define TIMER1_CR1 (*((volatile unsigned long *) 0xE0008030))
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191 #define TIMER1_CR2 (*((volatile unsigned long *) 0xE0008034))
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192 #define TIMER1_CR3 (*((volatile unsigned long *) 0xE0008038))
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193 #define TIMER1_EMR (*((volatile unsigned long *) 0xE000803C))
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194 #define TIMER1_CTCR (*((volatile unsigned long *) 0xE0008070))
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196 #define T1IR (*((volatile unsigned long *) 0xE0008000))
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197 #define T1TCR (*((volatile unsigned long *) 0xE0008004))
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198 #define T1TC (*((volatile unsigned long *) 0xE0008008))
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199 #define T1PR (*((volatile unsigned long *) 0xE000800C))
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200 #define T1PC (*((volatile unsigned long *) 0xE0008010))
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201 #define T1MCR (*((volatile unsigned long *) 0xE0008014))
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202 #define T1MR0 (*((volatile unsigned long *) 0xE0008018))
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203 #define T1MR1 (*((volatile unsigned long *) 0xE000801C))
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204 #define T1MR2 (*((volatile unsigned long *) 0xE0008020))
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205 #define T1MR3 (*((volatile unsigned long *) 0xE0008024))
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206 #define T1CCR (*((volatile unsigned long *) 0xE0008028))
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207 #define T1CR0 (*((volatile unsigned long *) 0xE000802C))
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208 #define T1CR1 (*((volatile unsigned long *) 0xE0008030))
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209 #define T1CR2 (*((volatile unsigned long *) 0xE0008034))
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210 #define T1CR3 (*((volatile unsigned long *) 0xE0008038))
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211 #define T1EMR (*((volatile unsigned long *) 0xE000803C))
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212 #define T1CTCR (*((volatile unsigned long *) 0xE0008070))
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214 /* Pulse Width Modulator (PWM) */
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215 #define PWM_IR (*((volatile unsigned long *) 0xE0014000))
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216 #define PWM_TCR (*((volatile unsigned long *) 0xE0014004))
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217 #define PWM_TC (*((volatile unsigned long *) 0xE0014008))
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218 #define PWM_PR (*((volatile unsigned long *) 0xE001400C))
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219 #define PWM_PC (*((volatile unsigned long *) 0xE0014010))
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220 #define PWM_MCR (*((volatile unsigned long *) 0xE0014014))
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221 #define PWM_MR0 (*((volatile unsigned long *) 0xE0014018))
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222 #define PWM_MR1 (*((volatile unsigned long *) 0xE001401C))
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223 #define PWM_MR2 (*((volatile unsigned long *) 0xE0014020))
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224 #define PWM_MR3 (*((volatile unsigned long *) 0xE0014024))
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225 #define PWM_MR4 (*((volatile unsigned long *) 0xE0014040))
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226 #define PWM_MR5 (*((volatile unsigned long *) 0xE0014044))
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227 #define PWM_MR6 (*((volatile unsigned long *) 0xE0014048))
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228 #define PWM_CCR (*((volatile unsigned long *) 0xE0014028))
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229 #define PWM_CR0 (*((volatile unsigned long *) 0xE001402C))
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230 #define PWM_CR1 (*((volatile unsigned long *) 0xE0014030))
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231 #define PWM_CR2 (*((volatile unsigned long *) 0xE0014034))
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232 #define PWM_CR3 (*((volatile unsigned long *) 0xE0014038))
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233 #define PWM_EMR (*((volatile unsigned long *) 0xE001403C))
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234 #define PWM_PCR (*((volatile unsigned long *) 0xE001404C))
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235 #define PWM_LER (*((volatile unsigned long *) 0xE0014050))
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237 #define PWMIR (*((volatile unsigned long *) 0xE0014000))
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238 #define PWMTCR (*((volatile unsigned long *) 0xE0014004))
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239 #define PWMTC (*((volatile unsigned long *) 0xE0014008))
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240 #define PWMPR (*((volatile unsigned long *) 0xE001400C))
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241 #define PWMPC (*((volatile unsigned long *) 0xE0014010))
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242 #define PWMMCR (*((volatile unsigned long *) 0xE0014014))
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243 #define PWMMR0 (*((volatile unsigned long *) 0xE0014018))
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244 #define PWMMR1 (*((volatile unsigned long *) 0xE001401C))
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245 #define PWMMR2 (*((volatile unsigned long *) 0xE0014020))
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246 #define PWMMR3 (*((volatile unsigned long *) 0xE0014024))
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247 #define PWMMR4 (*((volatile unsigned long *) 0xE0014040))
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248 #define PWMMR5 (*((volatile unsigned long *) 0xE0014044))
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249 #define PWMMR6 (*((volatile unsigned long *) 0xE0014048))
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250 #define PWMCCR (*((volatile unsigned long *) 0xE0014028))
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251 #define PWMCR0 (*((volatile unsigned long *) 0xE001402C))
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252 #define PWMCR1 (*((volatile unsigned long *) 0xE0014030))
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253 #define PWMCR2 (*((volatile unsigned long *) 0xE0014034))
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254 #define PWMCR3 (*((volatile unsigned long *) 0xE0014038))
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255 #define PWMEMR (*((volatile unsigned long *) 0xE001403C))
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256 #define PWMPCR (*((volatile unsigned long *) 0xE001404C))
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257 #define PWMLER (*((volatile unsigned long *) 0xE0014050))
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259 /* Universal Asynchronous Receiver Transmitter 0 (UART0) */
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260 #define UART0_RBR (*((volatile unsigned long *) 0xE000C000))
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261 #define UART0_THR (*((volatile unsigned long *) 0xE000C000))
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262 #define UART0_IER (*((volatile unsigned long *) 0xE000C004))
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263 #define UART0_IIR (*((volatile unsigned long *) 0xE000C008))
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264 #define UART0_FCR (*((volatile unsigned long *) 0xE000C008))
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265 #define UART0_LCR (*((volatile unsigned long *) 0xE000C00C))
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266 #define UART0_MCR (*((volatile unsigned long *) 0xE000C010))
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267 #define UART0_LSR (*((volatile unsigned long *) 0xE000C014))
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268 #define UART0_MSR (*((volatile unsigned long *) 0xE000C018))
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269 #define UART0_SCR (*((volatile unsigned long *) 0xE000C01C))
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270 #define UART0_ACR (*((volatile unsigned long *) 0xE000C020))
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271 #define UART0_FDR (*((volatile unsigned long *) 0xE000C028))
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272 #define UART0_TER (*((volatile unsigned long *) 0xE000C030))
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273 #define UART0_DLL (*((volatile unsigned long *) 0xE000C000))
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274 #define UART0_DLM (*((volatile unsigned long *) 0xE000C004))
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276 #define U0RBR (*((volatile unsigned long *) 0xE000C000))
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277 #define U0THR (*((volatile unsigned long *) 0xE000C000))
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278 #define U0IER (*((volatile unsigned long *) 0xE000C004))
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279 #define U0IIR (*((volatile unsigned long *) 0xE000C008))
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280 #define U0FCR (*((volatile unsigned long *) 0xE000C008))
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281 #define U0LCR (*((volatile unsigned long *) 0xE000C00C))
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282 #define U0MCR (*((volatile unsigned long *) 0xE000C010))
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283 #define U0LSR (*((volatile unsigned long *) 0xE000C014))
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284 #define U0MSR (*((volatile unsigned long *) 0xE000C018))
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285 #define U0SCR (*((volatile unsigned long *) 0xE000C01C))
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286 #define U0ACR (*((volatile unsigned long *) 0xE000C020))
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287 #define U0FDR (*((volatile unsigned long *) 0xE000C028))
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288 #define U0TER (*((volatile unsigned long *) 0xE000C030))
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289 #define U0DLL (*((volatile unsigned long *) 0xE000C000))
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290 #define U0DLM (*((volatile unsigned long *) 0xE000C004))
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292 /* Universal Asynchronous Receiver Transmitter 1 (UART1) */
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293 #define UART1_RBR (*((volatile unsigned long *) 0xE0010000))
\r
294 #define UART1_THR (*((volatile unsigned long *) 0xE0010000))
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295 #define UART1_IER (*((volatile unsigned long *) 0xE0010004))
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296 #define UART1_IIR (*((volatile unsigned long *) 0xE0010008))
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297 #define UART1_FCR (*((volatile unsigned long *) 0xE0010008))
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298 #define UART1_LCR (*((volatile unsigned long *) 0xE001000C))
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299 #define UART1_MCR (*((volatile unsigned long *) 0xE0010010))
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300 #define UART1_LSR (*((volatile unsigned long *) 0xE0010014))
\r
301 #define UART1_MSR (*((volatile unsigned long *) 0xE0010018))
\r
302 #define UART1_SCR (*((volatile unsigned long *) 0xE001001C))
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303 #define UART1_ACR (*((volatile unsigned long *) 0xE0010020))
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304 #define UART1_FDR (*((volatile unsigned long *) 0xE0010028))
\r
305 #define UART1_TER (*((volatile unsigned long *) 0xE0010030))
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306 #define UART1_DLL (*((volatile unsigned long *) 0xE0010000))
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307 #define UART1_DLM (*((volatile unsigned long *) 0xE0010004))
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309 #define U1RBR (*((volatile unsigned long *) 0xE0010000))
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310 #define U1THR (*((volatile unsigned long *) 0xE0010000))
\r
311 #define U1IER (*((volatile unsigned long *) 0xE0010004))
\r
312 #define U1IIR (*((volatile unsigned long *) 0xE0010008))
\r
313 #define U1FCR (*((volatile unsigned long *) 0xE0010008))
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314 #define U1LCR (*((volatile unsigned long *) 0xE001000C))
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315 #define U1MCR (*((volatile unsigned long *) 0xE0010010))
\r
316 #define U1LSR (*((volatile unsigned long *) 0xE0010014))
\r
317 #define U1MSR (*((volatile unsigned long *) 0xE0010018))
\r
318 #define U1SCR (*((volatile unsigned long *) 0xE001001C))
\r
319 #define U1ACR (*((volatile unsigned long *) 0xE0010020))
\r
320 #define U1FDR (*((volatile unsigned long *) 0xE0010028))
\r
321 #define U1TER (*((volatile unsigned long *) 0xE0010030))
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322 #define U1DLL (*((volatile unsigned long *) 0xE0010000))
\r
323 #define U1DLM (*((volatile unsigned long *) 0xE0010004))
\r
325 /* I2C Interface 0 */
\r
326 #define I2C_I2CONSET (*((volatile unsigned long *) 0xE001C000))
\r
327 #define I2C_I2STAT (*((volatile unsigned long *) 0xE001C004))
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328 #define I2C_I2DAT (*((volatile unsigned long *) 0xE001C008))
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329 #define I2C_I2ADR (*((volatile unsigned long *) 0xE001C00C))
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330 #define I2C_I2SCLH (*((volatile unsigned long *) 0xE001C010))
\r
331 #define I2C_I2SCLL (*((volatile unsigned long *) 0xE001C014))
\r
332 #define I2C_I2CONCLR (*((volatile unsigned long *) 0xE001C018))
\r
334 #define I2CONSET (*((volatile unsigned long *) 0xE001C000))
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335 #define I2STAT (*((volatile unsigned long *) 0xE001C004))
\r
336 #define I2DAT (*((volatile unsigned long *) 0xE001C008))
\r
337 #define I2ADR (*((volatile unsigned long *) 0xE001C00C))
\r
338 #define I2SCLH (*((volatile unsigned long *) 0xE001C010))
\r
339 #define I2SCLL (*((volatile unsigned long *) 0xE001C014))
\r
340 #define I2CONCLR (*((volatile unsigned long *) 0xE001C018))
\r
342 /* I2C Interface 1 */
\r
343 #define I21CONSET (*((volatile unsigned long *) 0xE005C000))
\r
344 #define I21STAT (*((volatile unsigned long *) 0xE005C004))
\r
345 #define I21DAT (*((volatile unsigned long *) 0xE005C008))
\r
346 #define I21ADR (*((volatile unsigned long *) 0xE005C00C))
\r
347 #define I21SCLH (*((volatile unsigned long *) 0xE005C010))
\r
348 #define I21SCLL (*((volatile unsigned long *) 0xE005C014))
\r
349 #define I21CONCLR (*((volatile unsigned long *) 0xE005C018))
\r
351 /* SPI (Serial Peripheral Interface) */
\r
352 #define SPI_SPCR (*((volatile unsigned long *) 0xE0020000))
\r
353 #define SPI_SPSR (*((volatile unsigned long *) 0xE0020004))
\r
354 #define SPI_SPDR (*((volatile unsigned long *) 0xE0020008))
\r
355 #define SPI_SPCCR (*((volatile unsigned long *) 0xE002000C))
\r
356 #define SPI_SPTCR (*((volatile unsigned long *) 0xE0020010))
\r
357 #define SPI_SPTSR (*((volatile unsigned long *) 0xE0020014))
\r
358 #define SPI_SPTOR (*((volatile unsigned long *) 0xE0020018))
\r
359 #define SPI_SPINT (*((volatile unsigned long *) 0xE002001C))
\r
361 #define S0SPCR (*((volatile unsigned long *) 0xE0020000))
\r
362 #define S0SPSR (*((volatile unsigned long *) 0xE0020004))
\r
363 #define S0SPDR (*((volatile unsigned long *) 0xE0020008))
\r
364 #define S0SPCCR (*((volatile unsigned long *) 0xE002000C))
\r
365 #define S0SPTCR (*((volatile unsigned long *) 0xE0020010))
\r
366 #define S0SPTSR (*((volatile unsigned long *) 0xE0020014))
\r
367 #define S0SPTOR (*((volatile unsigned long *) 0xE0020018))
\r
368 #define S0SPINT (*((volatile unsigned long *) 0xE002001C))
\r
370 /* SPI1 (Serial Peripheral Interface 1) */
\r
371 #define S1SPCR (*((volatile unsigned long *) 0xE0030000))
\r
372 #define S1SPSR (*((volatile unsigned long *) 0xE0030004))
\r
373 #define S1SPDR (*((volatile unsigned long *) 0xE0030008))
\r
374 #define S1SPCCR (*((volatile unsigned long *) 0xE003000C))
\r
375 #define S1SPTCR (*((volatile unsigned long *) 0xE0030010))
\r
376 #define S1SPTSR (*((volatile unsigned long *) 0xE0030014))
\r
377 #define S1SPTOR (*((volatile unsigned long *) 0xE0030018))
\r
378 #define S1SPINT (*((volatile unsigned long *) 0xE003001C))
\r
380 /* SSP Controller */
\r
381 #define SSPCR0 (*((volatile unsigned long *) 0xE0068000))
\r
382 #define SSPCR1 (*((volatile unsigned long *) 0xE0068004))
\r
383 #define SSPDR (*((volatile unsigned long *) 0xE0068008))
\r
384 #define SSPSR (*((volatile unsigned long *) 0xE006800C))
\r
385 #define SSPCPSR (*((volatile unsigned long *) 0xE0068010))
\r
386 #define SSPIMSC (*((volatile unsigned long *) 0xE0068014))
\r
387 #define SSPRIS (*((volatile unsigned long *) 0xE0068018))
\r
388 #define SSPMIS (*((volatile unsigned long *) 0xE006801C))
\r
389 #define SSPICR (*((volatile unsigned long *) 0xE0068020))
\r
391 /* Real Time Clock */
\r
392 #define RTC_ILR (*((volatile unsigned long *) 0xE0024000))
\r
393 #define RTC_CTC (*((volatile unsigned long *) 0xE0024004))
\r
394 #define RTC_CCR (*((volatile unsigned long *) 0xE0024008))
\r
395 #define RTC_CIIR (*((volatile unsigned long *) 0xE002400C))
\r
396 #define RTC_AMR (*((volatile unsigned long *) 0xE0024010))
\r
397 #define RTC_CTIME0 (*((volatile unsigned long *) 0xE0024014))
\r
398 #define RTC_CTIME1 (*((volatile unsigned long *) 0xE0024018))
\r
399 #define RTC_CTIME2 (*((volatile unsigned long *) 0xE002401C))
\r
400 #define RTC_SEC (*((volatile unsigned long *) 0xE0024020))
\r
401 #define RTC_MIN (*((volatile unsigned long *) 0xE0024024))
\r
402 #define RTC_HOUR (*((volatile unsigned long *) 0xE0024028))
\r
403 #define RTC_DOM (*((volatile unsigned long *) 0xE002402C))
\r
404 #define RTC_DOW (*((volatile unsigned long *) 0xE0024030))
\r
405 #define RTC_DOY (*((volatile unsigned long *) 0xE0024034))
\r
406 #define RTC_MONTH (*((volatile unsigned long *) 0xE0024038))
\r
407 #define RTC_YEAR (*((volatile unsigned long *) 0xE002403C))
\r
408 #define RTC_ALSEC (*((volatile unsigned long *) 0xE0024060))
\r
409 #define RTC_ALMIN (*((volatile unsigned long *) 0xE0024064))
\r
410 #define RTC_ALHOUR (*((volatile unsigned long *) 0xE0024068))
\r
411 #define RTC_ALDOM (*((volatile unsigned long *) 0xE002406C))
\r
412 #define RTC_ALDOW (*((volatile unsigned long *) 0xE0024070))
\r
413 #define RTC_ALDOY (*((volatile unsigned long *) 0xE0024074))
\r
414 #define RTC_ALMON (*((volatile unsigned long *) 0xE0024078))
\r
415 #define RTC_ALYEAR (*((volatile unsigned long *) 0xE002407C))
\r
416 #define RTC_PREINT (*((volatile unsigned long *) 0xE0024080))
\r
417 #define RTC_PREFRAC (*((volatile unsigned long *) 0xE0024084))
\r
419 #define ILR (*((volatile unsigned long *) 0xE0024000))
\r
420 #define CTC (*((volatile unsigned long *) 0xE0024004))
\r
421 #define CCR (*((volatile unsigned long *) 0xE0024008))
\r
422 #define CIIR (*((volatile unsigned long *) 0xE002400C))
\r
423 #define AMR (*((volatile unsigned long *) 0xE0024010))
\r
424 #define CTIME0 (*((volatile unsigned long *) 0xE0024014))
\r
425 #define CTIME1 (*((volatile unsigned long *) 0xE0024018))
\r
426 #define CTIME2 (*((volatile unsigned long *) 0xE002401C))
\r
427 #define SEC (*((volatile unsigned long *) 0xE0024020))
\r
428 #define MIN (*((volatile unsigned long *) 0xE0024024))
\r
429 #define HOUR (*((volatile unsigned long *) 0xE0024028))
\r
430 #define DOM (*((volatile unsigned long *) 0xE002402C))
\r
431 #define DOW (*((volatile unsigned long *) 0xE0024030))
\r
432 #define DOY (*((volatile unsigned long *) 0xE0024034))
\r
433 #define MONTH (*((volatile unsigned long *) 0xE0024038))
\r
434 #define YEAR (*((volatile unsigned long *) 0xE002403C))
\r
435 #define ALSEC (*((volatile unsigned long *) 0xE0024060))
\r
436 #define ALMIN (*((volatile unsigned long *) 0xE0024064))
\r
437 #define ALHOUR (*((volatile unsigned long *) 0xE0024068))
\r
438 #define ALDOM (*((volatile unsigned long *) 0xE002406C))
\r
439 #define ALDOW (*((volatile unsigned long *) 0xE0024070))
\r
440 #define ALDOY (*((volatile unsigned long *) 0xE0024074))
\r
441 #define ALMON (*((volatile unsigned long *) 0xE0024078))
\r
442 #define ALYEAR (*((volatile unsigned long *) 0xE002407C))
\r
443 #define PREINT (*((volatile unsigned long *) 0xE0024080))
\r
444 #define PREFRAC (*((volatile unsigned long *) 0xE0024084))
\r
446 /* A/D Converter */
\r
447 #define ADCR (*((volatile unsigned long *) 0xE0034000))
\r
448 #define ADDR (*((volatile unsigned long *) 0xE0034004))
\r
449 #define AD1CR (*((volatile unsigned long *) 0xE0060000))
\r
450 #define AD1DR (*((volatile unsigned long *) 0xE0060004))
\r
452 /* D/A Converter */
\r
453 #define DACR (*((volatile unsigned long *) 0xE006C000))
\r
455 /* USB Controller */
\r
456 /* Device Interrupt Registers */
\r
457 #define DEV_INT_STAT (*((volatile unsigned long *) 0xE0090000))
\r
458 #define DEV_INT_EN (*((volatile unsigned long *) 0xE0090004))
\r
459 #define DEV_INT_CLR (*((volatile unsigned long *) 0xE0090008))
\r
460 #define DEV_INT_SET (*((volatile unsigned long *) 0xE009000C))
\r
461 #define DEV_INT_PRIO (*((volatile unsigned long *) 0xE009002C))
\r
463 /* Endpoint Interrupt Registers */
\r
464 #define EP_INT_STAT (*((volatile unsigned long *) 0xE0090030))
\r
465 #define EP_INT_EN (*((volatile unsigned long *) 0xE0090034))
\r
466 #define EP_INT_CLR (*((volatile unsigned long *) 0xE0090038))
\r
467 #define EP_INT_SET (*((volatile unsigned long *) 0xE009003C))
\r
468 #define EP_INT_PRIO (*((volatile unsigned long *) 0xE0090040))
\r
470 /* Endpoint Realization Registers */
\r
471 #define REALIZE_EP (*((volatile unsigned long *) 0xE0090044))
\r
472 #define EP_INDEX (*((volatile unsigned long *) 0xE0090048))
\r
473 #define MAXPACKET_SIZE (*((volatile unsigned long *) 0xE009004C))
\r
475 /* Command Reagisters */
\r
476 #define CMD_CODE (*((volatile unsigned long *) 0xE0090010))
\r
477 #define CMD_DATA (*((volatile unsigned long *) 0xE0090014))
\r
479 /* Data Transfer Registers */
\r
480 #define RX_DATA (*((volatile unsigned long *) 0xE0090018))
\r
481 #define TX_DATA (*((volatile unsigned long *) 0xE009001C))
\r
482 #define RX_PLENGTH (*((volatile unsigned long *) 0xE0090020))
\r
483 #define TX_PLENGTH (*((volatile unsigned long *) 0xE0090024))
\r
484 #define USB_CTRL (*((volatile unsigned long *) 0xE0090028))
\r
486 /* DMA Registers */
\r
487 #define DMA_REQ_STAT (*((volatile unsigned long *) 0xE0090050))
\r
488 #define DMA_REQ_CLR (*((volatile unsigned long *) 0xE0090054))
\r
489 #define DMA_REQ_SET (*((volatile unsigned long *) 0xE0090058))
\r
490 #define UDCA_HEAD (*((volatile unsigned long *) 0xE0090080))
\r
491 #define EP_DMA_STAT (*((volatile unsigned long *) 0xE0090084))
\r
492 #define EP_DMA_EN (*((volatile unsigned long *) 0xE0090088))
\r
493 #define EP_DMA_DIS (*((volatile unsigned long *) 0xE009008C))
\r
494 #define DMA_INT_STAT (*((volatile unsigned long *) 0xE0090090))
\r
495 #define DMA_INT_EN (*((volatile unsigned long *) 0xE0090094))
\r
496 #define EOT_INT_STAT (*((volatile unsigned long *) 0xE00900A0))
\r
497 #define EOT_INT_CLR (*((volatile unsigned long *) 0xE00900A4))
\r
498 #define EOT_INT_SET (*((volatile unsigned long *) 0xE00900A8))
\r
499 #define NDD_REQ_INT_STAT (*((volatile unsigned long *) 0xE00900AC))
\r
500 #define NDD_REQ_INT_CLR (*((volatile unsigned long *) 0xE00900B0))
\r
501 #define NDD_REQ_INT_SET (*((volatile unsigned long *) 0xE00900B4))
\r
502 #define SYS_ERR_INT_STAT (*((volatile unsigned long *) 0xE00900B8))
\r
503 #define SYS_ERR_INT_CLR (*((volatile unsigned long *) 0xE00900BC))
\r
504 #define SYS_ERR_INT_SET (*((volatile unsigned long *) 0xE00900C0))
\r
505 #define MODULE_ID (*((volatile unsigned long *) 0xE00900FC))
\r
507 /* CAN Acceptance Filter RAM */
\r
508 #define AFRAM (*((volatile unsigned long *) 0xE0038000))
\r
510 /* CAN Acceptance Filter */
\r
511 #define AFMR (*((volatile unsigned long *) 0xE003C000))
\r
512 #define SFF_sa (*((volatile unsigned long *) 0xE003C004))
\r
513 #define SFF_GRP_sa (*((volatile unsigned long *) 0xE003C008))
\r
514 #define EFF_sa (*((volatile unsigned long *) 0xE003C00C))
\r
515 #define EFF_GRP_sa (*((volatile unsigned long *) 0xE003C010))
\r
516 #define ENDofTable (*((volatile unsigned long *) 0xE003C014))
\r
517 #define LUTerrAd (*((volatile unsigned long *) 0xE003C018))
\r
518 #define LUTerr (*((volatile unsigned long *) 0xE003C01C))
\r
520 /* CAN Central Registers */
\r
521 #define CANTxSR (*((volatile unsigned long *) 0xE0040000))
\r
522 #define CANRxSR (*((volatile unsigned long *) 0xE0040004))
\r
523 #define CANMSR (*((volatile unsigned long *) 0xE0040008))
\r
525 /* CAN Controller 1 (CAN1) */
\r
526 #define C1MOD (*((volatile unsigned long *) 0xE0044000))
\r
527 #define C1CMR (*((volatile unsigned long *) 0xE0044004))
\r
528 #define C1GSR (*((volatile unsigned long *) 0xE0044008))
\r
529 #define C1ICR (*((volatile unsigned long *) 0xE004400C))
\r
530 #define C1IER (*((volatile unsigned long *) 0xE0044010))
\r
531 #define C1BTR (*((volatile unsigned long *) 0xE0044014))
\r
532 #define C1EWL (*((volatile unsigned long *) 0xE0044018))
\r
533 #define C1SR (*((volatile unsigned long *) 0xE004401C))
\r
534 #define C1RFS (*((volatile unsigned long *) 0xE0044020))
\r
535 #define C1RID (*((volatile unsigned long *) 0xE0044024))
\r
536 #define C1RDA (*((volatile unsigned long *) 0xE0044028))
\r
537 #define C1RDB (*((volatile unsigned long *) 0xE004402C))
\r
538 #define C1TFI1 (*((volatile unsigned long *) 0xE0044030))
\r
539 #define C1TID1 (*((volatile unsigned long *) 0xE0044034))
\r
540 #define C1TDA1 (*((volatile unsigned long *) 0xE0044038))
\r
541 #define C1TDB1 (*((volatile unsigned long *) 0xE004403C))
\r
542 #define C1TFI2 (*((volatile unsigned long *) 0xE0044040))
\r
543 #define C1TID2 (*((volatile unsigned long *) 0xE0044044))
\r
544 #define C1TDA2 (*((volatile unsigned long *) 0xE0044048))
\r
545 #define C1TDB2 (*((volatile unsigned long *) 0xE004404C))
\r
546 #define C1TFI3 (*((volatile unsigned long *) 0xE0044050))
\r
547 #define C1TID3 (*((volatile unsigned long *) 0xE0044054))
\r
548 #define C1TDA3 (*((volatile unsigned long *) 0xE0044058))
\r
549 #define C1TDB3 (*((volatile unsigned long *) 0xE004405C))
\r
551 /* CAN Controller 2 (CAN2) */
\r
552 #define C2MOD (*((volatile unsigned long *) 0xE0048000))
\r
553 #define C2CMR (*((volatile unsigned long *) 0xE0048004))
\r
554 #define C2GSR (*((volatile unsigned long *) 0xE0048008))
\r
555 #define C2ICR (*((volatile unsigned long *) 0xE004800C))
\r
556 #define C2IER (*((volatile unsigned long *) 0xE0048010))
\r
557 #define C2BTR (*((volatile unsigned long *) 0xE0048014))
\r
558 #define C2EWL (*((volatile unsigned long *) 0xE0048018))
\r
559 #define C2SR (*((volatile unsigned long *) 0xE004801C))
\r
560 #define C2RFS (*((volatile unsigned long *) 0xE0048020))
\r
561 #define C2RID (*((volatile unsigned long *) 0xE0048024))
\r
562 #define C2RDA (*((volatile unsigned long *) 0xE0048028))
\r
563 #define C2RDB (*((volatile unsigned long *) 0xE004802C))
\r
564 #define C2TFI1 (*((volatile unsigned long *) 0xE0048030))
\r
565 #define C2TID1 (*((volatile unsigned long *) 0xE0048034))
\r
566 #define C2TDA1 (*((volatile unsigned long *) 0xE0048038))
\r
567 #define C2TDB1 (*((volatile unsigned long *) 0xE004803C))
\r
568 #define C2TFI2 (*((volatile unsigned long *) 0xE0048040))
\r
569 #define C2TID2 (*((volatile unsigned long *) 0xE0048044))
\r
570 #define C2TDA2 (*((volatile unsigned long *) 0xE0048048))
\r
571 #define C2TDB2 (*((volatile unsigned long *) 0xE004804C))
\r
572 #define C2TFI3 (*((volatile unsigned long *) 0xE0048050))
\r
573 #define C2TID3 (*((volatile unsigned long *) 0xE0048054))
\r
574 #define C2TDA3 (*((volatile unsigned long *) 0xE0048058))
\r
575 #define C2TDB3 (*((volatile unsigned long *) 0xE004805C))
\r
577 /* CAN Controller 3 (CAN3) */
\r
578 #define C3MOD (*((volatile unsigned long *) 0xE004C000))
\r
579 #define C3CMR (*((volatile unsigned long *) 0xE004C004))
\r
580 #define C3GSR (*((volatile unsigned long *) 0xE004C008))
\r
581 #define C3ICR (*((volatile unsigned long *) 0xE004C00C))
\r
582 #define C3IER (*((volatile unsigned long *) 0xE004C010))
\r
583 #define C3BTR (*((volatile unsigned long *) 0xE004C014))
\r
584 #define C3EWL (*((volatile unsigned long *) 0xE004C018))
\r
585 #define C3SR (*((volatile unsigned long *) 0xE004C01C))
\r
586 #define C3RFS (*((volatile unsigned long *) 0xE004C020))
\r
587 #define C3RID (*((volatile unsigned long *) 0xE004C024))
\r
588 #define C3RDA (*((volatile unsigned long *) 0xE004C028))
\r
589 #define C3RDB (*((volatile unsigned long *) 0xE004C02C))
\r
590 #define C3TFI1 (*((volatile unsigned long *) 0xE004C030))
\r
591 #define C3TID1 (*((volatile unsigned long *) 0xE004C034))
\r
592 #define C3TDA1 (*((volatile unsigned long *) 0xE004C038))
\r
593 #define C3TDB1 (*((volatile unsigned long *) 0xE004C03C))
\r
594 #define C3TFI2 (*((volatile unsigned long *) 0xE004C040))
\r
595 #define C3TID2 (*((volatile unsigned long *) 0xE004C044))
\r
596 #define C3TDA2 (*((volatile unsigned long *) 0xE004C048))
\r
597 #define C3TDB2 (*((volatile unsigned long *) 0xE004C04C))
\r
598 #define C3TFI3 (*((volatile unsigned long *) 0xE004C050))
\r
599 #define C3TID3 (*((volatile unsigned long *) 0xE004C054))
\r
600 #define C3TDA3 (*((volatile unsigned long *) 0xE004C058))
\r
601 #define C3TDB3 (*((volatile unsigned long *) 0xE004C05C))
\r
603 /* CAN Controller 4 (CAN4) */
\r
604 #define C4MOD (*((volatile unsigned long *) 0xE0050000))
\r
605 #define C4CMR (*((volatile unsigned long *) 0xE0050004))
\r
606 #define C4GSR (*((volatile unsigned long *) 0xE0050008))
\r
607 #define C4ICR (*((volatile unsigned long *) 0xE005000C))
\r
608 #define C4IER (*((volatile unsigned long *) 0xE0050010))
\r
609 #define C4BTR (*((volatile unsigned long *) 0xE0050014))
\r
610 #define C4EWL (*((volatile unsigned long *) 0xE0050018))
\r
611 #define C4SR (*((volatile unsigned long *) 0xE005001C))
\r
612 #define C4RFS (*((volatile unsigned long *) 0xE0050020))
\r
613 #define C4RID (*((volatile unsigned long *) 0xE0050024))
\r
614 #define C4RDA (*((volatile unsigned long *) 0xE0050028))
\r
615 #define C4RDB (*((volatile unsigned long *) 0xE005002C))
\r
616 #define C4TFI1 (*((volatile unsigned long *) 0xE0050030))
\r
617 #define C4TID1 (*((volatile unsigned long *) 0xE0050034))
\r
618 #define C4TDA1 (*((volatile unsigned long *) 0xE0050038))
\r
619 #define C4TDB1 (*((volatile unsigned long *) 0xE005003C))
\r
620 #define C4TFI2 (*((volatile unsigned long *) 0xE0050040))
\r
621 #define C4TID2 (*((volatile unsigned long *) 0xE0050044))
\r
622 #define C4TDA2 (*((volatile unsigned long *) 0xE0050048))
\r
623 #define C4TDB2 (*((volatile unsigned long *) 0xE005004C))
\r
624 #define C4TFI3 (*((volatile unsigned long *) 0xE0050050))
\r
625 #define C4TID3 (*((volatile unsigned long *) 0xE0050054))
\r
626 #define C4TDA3 (*((volatile unsigned long *) 0xE0050058))
\r
627 #define C4TDB3 (*((volatile unsigned long *) 0xE005005C))
\r
630 #define WDMOD (*((volatile unsigned long *) 0xE0000000))
\r
631 #define WDTC (*((volatile unsigned long *) 0xE0000004))
\r
632 #define WDFEED (*((volatile unsigned long *) 0xE0000008))
\r
633 #define WDTV (*((volatile unsigned long *) 0xE000000C))
\r
635 #endif // __LPC2xxx_H
\r