2 * lpcload.c - load firmware into ram of lpc2220 via uart0
4 * author: hackbard@hackdaworld.org, rolf.anders@physik.uni-augsburg.de
7 * usage: sudo ./lpcload -d /dev/ttyS0 -f firmware.hex [-v]
14 #include <sys/types.h>
19 #define VERBOSE (1<<0)
20 #define FIRMWARE (1<<1)
22 #define TXRX_TYPE_BAUD 0x01
23 #define TXRX_TYPE_SYNC 0x02
24 #define TXRX_TYPE_CMD 0x03
25 #define TXRX_TYPE_DATA 0x04
26 #define TXRX_TYPE_CKSM 0x05
28 #define CMD_SUCCESS "0\r\n"
29 #define INVALID_COMMAND "1\r\n"
30 #define SRC_ADDR_ERROR "2\r\n"
31 #define DST_ADDR_ERROR "3\r\n"
32 #define SRC_ADDR_NOT_MAPPED "4\r\n"
33 #define DST_ADDR_NOT_MAPPED "5\r\n"
34 #define COUNT_ERROR "6\r\n"
35 #define COMPARE_ERROR "10\r\n"
37 #define PARAM_ERROR "12\r\n"
38 #define ADDR_ERROR "13\r\n"
39 #define ADDR_NOT_MAPPED "14\r\n"
40 #define CMD_LOCKED "15\r\n"
41 #define INVALID_CODE "16\r\n"
42 #define INVALID_BAUD_RATE "17\r\n"
43 #define INVALID_STOP_BIT "18\r\n"
45 #define CRYSTFREQ "10000"
46 #define RAMOFFSET 0x40000200
50 typedef unsigned char u8;
51 typedef unsigned short u16;
52 typedef unsigned int u32;
54 typedef struct s_lpc {
55 int sfd; /* serial fd */
56 char sdev[128]; /* seriel device */
57 int fwfd; /* fimrware fd */
58 char fwfile[128]; /* firmware file */
59 u8 info; /* info/mode */
60 char freq[8]; /* frequency */
61 u32 hoff; /* start addr of ihex file */
62 u32 roff; /* ram offset of uc */
67 printf("possible argv:\n");
68 printf(" -d <serial device>\n");
69 printf(" -f <firmware>\n");
70 printf(" -c <crystal freq>\n");
71 printf(" -r <ram offset>\n");
76 int open_serial_device(t_lpc *lpc) {
80 //memset(&term,0,sizeof(struct termios));
82 /* open serial device */
84 lpc->sfd=open(lpc->sdev,O_RDWR);
90 /* configure the serial device */
92 tcgetattr(lpc->sfd,&term);
94 // input/output baudrate
96 cfsetispeed(&term,B9600);
97 cfsetospeed(&term,B9600);
99 // control options -> 8n1
101 term.c_cflag&=~PARENB; // no parity
102 term.c_cflag&=~CSTOPB; // only 1 stop bit
103 term.c_cflag&=~CSIZE; // no bit mask for data bits
104 term.c_cflag|=CS8; // 8 data bits
106 // line options -> raw input
108 term.c_lflag&=~(ICANON|ECHO|ECHOE|ISIG);
110 // input options -> enable flow control
112 //term.c_iflag&=~(IXON|IXOFF|IXANY|INLCR|ICRNL);
113 term.c_iflag&=~(INLCR|ICRNL|IXANY);
114 term.c_iflag|=(IXON|IXOFF);
116 // more control options -> timeout / flow control
119 term.c_cc[VTIME]=10; // 1 second timeout
120 term.c_cc[VSTART]=0x11;
121 term.c_cc[VSTOP]=0x13;
123 tcsetattr(lpc->sfd,TCSANOW,&term);
128 int open_firmware(t_lpc *lpc) {
133 /* open firmware file */
135 lpc->fwfd=open(lpc->fwfile,O_RDONLY);
140 /* read hex file offset */
142 ret=read(lpc->fwfd,buf,7);
144 printf("fw open: not an intel hex file?\n");
147 sscanf(buf+3,"%04x",&(lpc->hoff));
148 lseek(lpc->fwfd,0,SEEK_SET);
153 int txrx(t_lpc *lpc,char *buf,int len,u8 type) {
160 if(lpc->info&VERBOSE)
164 ret=write(lpc->sfd,buf+cnt,len);
166 perror("txrx write");
169 if(lpc->info&VERBOSE)
172 ((buf[cnt+i]>0x19)&(buf[cnt+i]<0x7f))?
177 if(lpc->info&VERBOSE) {
180 printf("%02x ",buf[i]);
181 printf("| (%d)\n",cnt);
184 /* cut the echo if not of type auto baud */
186 if(type!=TXRX_TYPE_BAUD) {
188 ret=read(lpc->sfd,buf,cnt);
190 perror("txrx echo cut");
197 /* return here if type is data */
199 if(type==TXRX_TYPE_DATA)
204 ret=read(lpc->sfd,buf,1);
206 perror("txrx read (first byte)");
224 printf("txrx read: bad return byte '%02x'\n",buf[0]);
231 ret=read(lpc->sfd,buf+1+cnt-i,i);
233 perror("txrx read (next bytes)");
238 if(lpc->info&VERBOSE) {
241 printf("%c",((buf[i]>0x19)&(buf[i]<0x7f))?
245 printf("%02x ",buf[i]);
246 printf("| (%d)\n",cnt+1);
250 /* check/strip return code if type is cmd */
252 if(type==TXRX_TYPE_CMD) {
253 ret=strlen(CMD_SUCCESS);
254 if(!strncmp(buf,CMD_SUCCESS,ret)) {
260 printf("txrx bad return code!\n");
268 int bl_init(t_lpc *lpc) {
273 /* auto baud sequence */
275 txrx(lpc,buf,1,TXRX_TYPE_BAUD);
276 if(strncmp(buf,"Synchronized\r\n",14)) {
277 printf("auto baud detection failed\n");
281 /* tell bl that we are synchronized (it's allready in buf) */
282 txrx(lpc,buf,14,TXRX_TYPE_SYNC);
283 if(strncmp(buf,"OK\r\n",4)) {
284 printf("sync failed\n");
288 /* tell bl the crystal frequency */
289 len=strlen(lpc->freq)+2;
290 strncpy(buf,lpc->freq,BUFSIZE);
293 txrx(lpc,buf,len,TXRX_TYPE_SYNC);
294 if(strncmp(buf,"OK\r\n",4)) {
295 printf("freq set failed\n");
302 int unlock_go(t_lpc *lpc) {
307 memcpy(buf,"U 23130\r\n",9);
308 ret=txrx(lpc,buf,9,TXRX_TYPE_CMD);
318 snprintf(buf,BUFSIZE,"G %d A\r\n",lpc->roff);
320 ret=txrx(lpc,buf,ret,TXRX_TYPE_CMD);
325 int uuencode(u8 *in,u8 *out,int len) {
328 out[1]=0x20+((in[0]>>2)&0x3f);
329 out[2]=0x20+(((in[0]<<4)|(in[1]>>4))&0x3f);
330 out[3]=0x20+(((in[1]<<2)|(in[2]>>6))&0x3f);
331 out[4]=0x20+(in[2]&0x3f);
336 int write_to_ram(t_lpc *lpc,char *buf,u32 addr,int len) {
340 char txrxbuf[BUFSIZE];
347 printf("ram write: not a multiple of 4\n");
351 /* make it a multiple of 3 (reason: uuencode) */
354 printf("ram write: too much data\n");
357 for(i=len;i<nlen;i++) buf[i]=0;
360 addr+=(lpc->roff-lpc->hoff);
362 /* prepare write command */
363 if(lpc->info&VERBOSE)
364 printf("writing 0x%02x bytes to 0x%08x\n",len,addr);
365 snprintf(txrxbuf,BUFSIZE,"W %d %d\r\n",addr,len);
366 slen=strlen(txrxbuf);
368 /* send command and check return code */
369 txrx(lpc,txrxbuf,slen,TXRX_TYPE_CMD);
378 /* uuencode / prepare data bytes */
379 uuencode((u8 *)(buf+bcnt),(u8 *)(txrxbuf),bcnt==nlen-3?len%3:3);
384 checksum+=((u8)buf[bcnt]+(u8)buf[bcnt+1]+(u8)buf[bcnt+2]);
386 /* send a data line */
387 txrx(lpc,txrxbuf,6,TXRX_TYPE_DATA);
389 /* increase counters */
395 if((!(lcount%20))|(bcnt==nlen)) {
397 memcpy(txrxbuf,"`\r\n",3);
398 //txrx(lpc,txrxbuf,3,TXRX_TYPE_DATA);
400 snprintf(txrxbuf,BUFSIZE,"%d\r\n",checksum);
401 slen=strlen(txrxbuf);
402 txrx(lpc,txrxbuf,slen,TXRX_TYPE_CKSM);
403 if(!strncmp(txrxbuf,"RESE",4)) {
404 read(lpc->sfd,txrxbuf+4,4);
405 printf("ram write: resending ...\n");
408 if(strncmp(txrxbuf,"OK\r\n",4)) {
409 printf("ram write: bad response\n");
412 /* reset checksum & counter */
422 int firmware_to_ram(t_lpc *lpc) {
432 ret=read(lpc->fwfd,buf,1);
442 printf("fw to ram: no ihex format\n");
446 ret=read(lpc->fwfd,buf,2);
447 sscanf(buf,"%02x",&len);
449 printf("fw to ram: len not a multiple of 4\n");
453 ret=read(lpc->fwfd,buf,4);
454 sscanf(buf,"%04x",&addr);
456 ret=read(lpc->fwfd,buf,2);
457 sscanf(buf,"%02x",&type);
458 /* successfull return if type is end of file */
461 /* read data (and cksum) */
462 ret=read(lpc->fwfd,buf,2*(len+1));
463 if(ret!=(2*(len+1))) {
464 printf("fw to ram: data missing\n");
467 for(ret=0;ret<len;ret++) {
468 sscanf(buf+2*ret,"%02x",&temp);
471 /* act according to type */
477 write_to_ram(lpc,buf,addr,len);
480 printf("fw to ram: unknown type %02x\n",type);
488 int main(int argc,char **argv) {
497 memset(&lpc,0,sizeof(t_lpc));
498 strncpy(lpc.freq,CRYSTFREQ,7);
503 for(i=1;i<argc;i++) {
505 if(argv[i][0]!='-') {
512 strncpy(lpc.sdev,argv[++i],127);
515 strncpy(lpc.fwfile,argv[++i],127);
522 strncpy(lpc.freq,argv[++i],7);
531 /* open serial port */
532 if(open_serial_device(&lpc)<0)
535 /* open firmware file */
536 if(open_firmware(&lpc)<0)
539 /* boot loader init */
540 printf("boot loader init ...\n");
544 /* parse intel hex file and write to ram */
545 printf("write firmware to ram ...\n");
546 firmware_to_ram(&lpc);