+ T1TCR=0x01;
+ }
+}
+
+// pwm interrupts
+void interrupt_pwm_set_rate(u32 rate) {
+
+ PWMMR0=rate;
+}
+
+void interrupt_pwm_match_config(u8 mnum,u8 op,u8 mode,u32 val1,u32 val2) {
+
+ u32 *addr=&PWMR0;
+
+ *((volatile u32 *)(addr+mnum))=mval;
+ PWMMCR=(PWMMCR&0x1fffff)|(mode<<(op*3));
+}
+
+void interrupt_pwm_enable(u8 mode,u32 ps_val) {
+
+ PWMPR=ps_val;
+ PWMTCR=0x0b;
+}
+
+void interrupt_pwm_ir_set(u8 pwm_channel) {
+
+ PWMIR=(pwm_channel&0x0f)|((pwm_channel&0x70)<<4);
+ PWMTCR=0x09;