By MBE, lower process temperatures than these typically employed in CVD have been realized~\cite{hatayama95,henke95,fuyuki97,takaoka98}, which is essential for limiting thermal stresses and to avoid resulting substrate bending, a key issue in obtaining large area 3C-SiC surfaces.
In summary, the almost universal use of Si has allowed significant progress in the understanding of heteroepitaxial growth of SiC on Si.
However, mismatches in the thermal expansion coefficient and the lattice parameter cause a considerably high concentration of various defects, which is responsible for structural and electrical qualities that are not yet satisfactory.
By MBE, lower process temperatures than these typically employed in CVD have been realized~\cite{hatayama95,henke95,fuyuki97,takaoka98}, which is essential for limiting thermal stresses and to avoid resulting substrate bending, a key issue in obtaining large area 3C-SiC surfaces.
In summary, the almost universal use of Si has allowed significant progress in the understanding of heteroepitaxial growth of SiC on Si.
However, mismatches in the thermal expansion coefficient and the lattice parameter cause a considerably high concentration of various defects, which is responsible for structural and electrical qualities that are not yet satisfactory.