start of pwm interrupt support

diff --git a/betty/interrupts.c b/betty/interrupts.c
index 0e0baa32bbbb04866fc9985b3f00095a98402b5e..df99354c84c4cebb60bca5c0d15f8363e61db589 100644 (file)
--- a/betty/interrupts.c
+++ b/betty/interrupts.c
@@ -151,7 +151,7 @@ void interrupt_ext_ir_set(u8 eint) {
 }
 
 // timer counter interrupts
-void interrupt_tc_config(u8 tcnum,u8 mode,u8 cap,u32 psc) {
+void interrupt_tc_config(u8 tcnum,u8 mode,u8 cap,u32 psv) {
 
        if(tcnum>1)
                return;
@@ -159,12 +159,12 @@ void interrupt_tc_config(u8 tcnum,u8 mode,u8 cap,u32 psc) {
        if(tcnum==0) {
                T0TCR=0x03;
                T0CTCR=mode|(cap<<2);
-               T0PR=psc;
+               T0PR=psv;
        }
        else {
                T1TCR=0x03;
                T1CTCR=mode|(cap<<2);
-               T1PR=psc;
+               T1PR=psv;
        }
 }
 
@@ -179,11 +179,11 @@ void interrupt_tc_match_config(u8 tcnum,u8 mnum,u32 val,u8 mode) {
                return;
 
        if(tcnum==0) {
-               T0MCR=mode<<(3*mnum);
+               T0MCR=(T0MCR&0x0fff)|(mode<<(3*mnum));
                mrddr=&T0MR0
        }
        else {
-               T1MCR=mode<<(3*mnum);
+               T1MCR=(T1MCR&0x0fff)|(mode<<(3*mnum));
                mrddr=&T1MR0
        }
 
@@ -199,9 +199,9 @@ void interrupt_tc_capt_config(u8 tcnum,u8 cnum,u8 mode) {
                return;
 
        if(tcnum==0)
-               T0CCR=mode<<(3*cnum);
+               T0CCR=(T0CCR&0x0fff)|(mode<<(3*cnum));
        else
-               T1CCR=mode<<(3*cnum);
+               T1CCR=(T1CCR&0x0fff)|(mode<<(3*cnum));
 }
 
 void interrupt_tc_ir_set(u8 tcnum,u8 tcmc) {
@@ -209,10 +209,40 @@ void interrupt_tc_ir_set(u8 tcnum,u8 tcmc) {
        if(tcnum>1)
                return;
 
-       if(tcnum==0)
+       if(tcnum==0) {
                T0IR=tcmc;
-       else
+               T0TCR=0x01;
+       }
+       else {
                T1IR=tcmc;
+               T1TCR=0x01;
+       }
+}
+
+// pwm interrupts
+void interrupt_pwm_set_rate(u32 rate) {
+
+       PWMMR0=rate;
+}
+
+void interrupt_pwm_match_config(u8 mnum,u8 op,u8 mode,u32 val1,u32 val2) {
+
+       u32 *addr=&PWMR0;
+
+       *((volatile u32 *)(addr+mnum))=mval;
+       PWMMCR=(PWMMCR&0x1fffff)|(mode<<(op*3));
+}
+
+void interrupt_pwm_enable(u8 mode,u32 ps_val) {
+
+       PWMPR=ps_val;
+       PWMTCR=0x0b;
+}
+
+void interrupt_pwm_ir_set(u8 pwm_channel) {
+
+       PWMIR=(pwm_channel&0x0f)|((pwm_channel&0x70)<<4);
+       PWMTCR=0x09;
 }
 
 /*