From: hackbard <hackbard>
Date: Sat, 3 Mar 2007 23:33:13 +0000 (+0000)
Subject: some hdw-tank stuff at gergos place ...
X-Git-Url: https://hackdaworld.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bc07798b093617e4b907b3fdb2155dc098b03e0b;p=my-code%2Fatmel.git

some hdw-tank stuff at gergos place ...
---

diff --git a/hdw-tank/main.asm b/hdw-tank/main.asm
new file mode 100644
index 0000000..e1ee14d
--- /dev/null
+++ b/hdw-tank/main.asm
@@ -0,0 +1,213 @@
+; main file of hdw-tank project
+;
+; author: hackbard@hackdaworld.org
+;
+
+; defines
+.define tmp	= r16
+
+; interrupts
+jmp RESET 
+jmp EXT_INT0 
+jmp EXT_INT1 
+jmp EXT_INT2 
+jmp EXT_INT3 
+jmp EXT_INT4 
+jmp EXT_INT5 
+jmp EXT_INT6 
+jmp EXT_INT7 
+jmp TIM2_COMP 
+jmp TIM2_OVF 
+jmp TIM1_CAPT 
+jmp TIM1_COMPA
+jmp TIM1_COMPB
+jmp TIM1_OVF 
+jmp TIM0_COMP 
+jmp TIM0_OVF 
+jmp SPI_STC 
+jmp USART0_RXC
+jmp USART0_DRE
+jmp USART0_TXC
+jmp ADC 
+jmp EE_RDY 
+jmp ANA_COMP 
+jmp TIM1_COMPC
+jmp TIM3_CAPT 
+jmp TIM3_COMPA
+jmp TIM3_COMPB
+jmp TIM3_COMPC
+jmp TIM3_OVF 
+jmp USART1_RXC
+jmp USART1_DRE
+jmp USART1_TXC
+jmp TWI 
+jmp SPM_RDY 
+
+; include subroutines
+.include "motor.asm"
+.include "uart.asm"
+
+RESET:
+INIT:
+
+	; motor init
+	call 
+	; uart init
+
+	; set stackpointer
+	ldi r16, high(RAMEND)
+	out SPH,r16 
+	ldi r16, low(RAMEND)
+	out SPL,r16
+
+	; global interrupt enable
+	sei 
+
+
+
+
+;
+; interrupt routines
+;
+
+EXT_INT0:
+	nop
+	reti
+
+EXT_INT1:
+	nop
+	reti
+
+EXT_INT2:
+	nop
+	reti
+
+EXT_INT3:
+	nop
+	reti
+
+EXT_INT4:
+	nop
+	reti
+
+EXT_INT5:
+	nop
+	reti
+
+EXT_INT6:
+	nop
+	reti
+
+EXT_INT7:
+	nop
+	reti
+
+TIM2_COMP:
+	nop
+	reti
+
+TIM2_OVF:
+	nop
+	reti
+
+TIM1_CAPT:
+	nop
+	reti
+
+TIM1_COMPA:
+	nop
+	reti
+
+TIM1_COMPB:
+	nop
+	reti
+
+TIM1_OVF:
+	nop
+	reti
+
+TIM0_COMP:
+	nop
+	reti
+
+TIM0_OVF:
+	nop
+	reti
+
+SPI_STC:
+	nop
+	reti
+
+USART0_RXC:
+
+	; read received byte and drive the motor
+	; in addition, loop it back to the host
+
+	in UDR
+
+	reti
+
+USART0_DRE:
+	nop
+	reti
+
+USART0_TXC:
+	nop
+	reti
+
+ADC:
+	nop
+	reti
+
+EE_RDY:
+	nop
+	reti
+
+ANA_COMP:
+	nop
+	reti
+
+TIM1_COMPC:
+	nop
+	reti
+
+TIM3_CAPT:
+	nop
+	reti
+
+TIM3_COMPA:
+	nop
+	reti
+
+TIM3_COMPB:
+	nop
+	reti
+
+TIM3_COMPC:
+	nop
+	reti
+
+TIM3_OVF:
+	nop
+	reti
+
+USART1_RXC:
+	nop
+	reti
+
+USART1_DRE:
+	nop
+	reti
+
+USART1_TXC:
+	nop
+	reti
+
+TWI:
+	nop
+	reti
+
+SPM_RDY:
+	nop
+	reti
+
diff --git a/hdw-tank/motor.asm b/hdw-tank/motor.asm
new file mode 100644
index 0000000..9386180
--- /dev/null
+++ b/hdw-tank/motor.asm
@@ -0,0 +1,67 @@
+; motor functions
+
+;include "../include/m128def.inc"
+
+.equ	MOT_DIR_L	= 0x02
+.equ	MOT_DIR_R	= 0x03
+.equ	MOT_PWR_L	= 0x04
+.equ	MOT_PWR_R	= 0x07
+
+;.def	tmp		= r17
+
+MOTOR_INIT:
+
+	; ports -> output
+	in tmp,DDRB
+	sbr tmp,(1<<MOT_DIR_L)|(1<<MOT_DIR_R)
+	sbr tmp,(1<<MOT_PWR_L)|(1<<MOT_PWR_R)
+	out DDRB,tmp
+
+MOTOR_STOP:
+
+	; output zero
+	in tmp,PORTB
+	cbr tmp,(1<<MOT_DIR_L)|(1<<MOT_DIR_R)
+	cbr tmp,(1<<MOT_PWR_L)|(1<<MOT_PWR_R)
+	out PORTB,tmp
+
+	ret
+
+MOTOR_FWD:
+
+	in tmp,PORTB
+	sbr tmp,(1<<MOT_DIR_L)|(1<<MOT_DIR_R)
+	sbr tmp,(1<<MOT_PWR_L)|(1<<MOT_PWR_R)
+	out PORTB,tmp
+
+	ret
+
+MOTOR_BWD:
+
+	in tmp,PORTB
+	cbr tmp,(1<<MOT_DIR_L)|(1<<MOT_DIR_R)
+	sbr tmp,(1<<MOT_PWR_L)|(1<<MOT_PWR_R)
+	out PORTB,tmp
+
+	ret
+
+MOTOR_RIGHT:
+
+	in tmp,PORTB
+	sbr tmp,(1<<MOT_DIR_L)
+	cbr tmp,(1<<MOT_DIR_R)
+	sbr tmp,(1<<MOT_PWR_L)|(1<<MOT_PWR_R)
+	out PORTB,tmp
+
+	ret
+
+MOTOR_LEFT:
+
+	in tmp,PORTB
+	sbr tmp,(1<<MOT_DIR_R)
+	cbr tmp,(1<<MOT_DIR_L)
+	sbr tmp,(1<<MOT_PWR_L)|(1<<MOT_PWR_R)
+	out PORTB,tmp
+
+	ret
+
diff --git a/hdw-tank/uart.asm b/hdw-tank/uart.asm
new file mode 100644
index 0000000..1ca82e0
--- /dev/null
+++ b/hdw-tank/uart.asm
@@ -0,0 +1,36 @@
+; uart functions
+
+UART_INIT:
+
+	; baudrate
+	ldi tmp,
+	out UBRRH,tmp
+	ldi tmp,
+	out UBRRL,tmp
+
+	; enable
+	ldi tmp,(1<<RXEN)|(1<<TXEN)
+	out UCSRB,tmp
+
+	; frame format
+
+	ret
+
+UART_RX:
+
+	; get/store received byte
+	sbis UCSRA,RXC
+		rjmp UART_RX
+	in tmp,UDR0
+
+	ret
+
+UART_TX:
+
+	; transmit content of tmp
+	sbis UCSRA,UDRE
+		rjmp UART_TX
+	out UDR0,tmp
+
+	ret
+