2 * lpcload.c - load firmware into ram of lpc2220 via uart0
4 * author: hackbard@hackdaworld.org, rolf.anders@physik.uni-augsburg.de
7 * usage: sudo ./lpcload -d /dev/ttyS0 -f firmware.hex [-v]
14 #include <sys/types.h>
19 #define VERBOSE (1<<0)
20 #define FIRMWARE (1<<1)
22 #define TXRX_TYPE_SYNC 0x00
23 #define TXRX_TYPE_CKSM 0x00
24 #define TXRX_TYPE_BAUD 0x01
25 #define TXRX_TYPE_CMD 0x02
26 #define TXRX_TYPE_DATA 0x03
27 #define TXRX_TYPE_GO 0x04
29 #define CMD_SUCCESS "0\r\n"
30 #define INVALID_COMMAND "1\r\n"
31 #define SRC_ADDR_ERROR "2\r\n"
32 #define DST_ADDR_ERROR "3\r\n"
33 #define SRC_ADDR_NOT_MAPPED "4\r\n"
34 #define DST_ADDR_NOT_MAPPED "5\r\n"
35 #define COUNT_ERROR "6\r\n"
36 #define COMPARE_ERROR "10\r\n"
38 #define PARAM_ERROR "12\r\n"
39 #define ADDR_ERROR "13\r\n"
40 #define ADDR_NOT_MAPPED "14\r\n"
41 #define CMD_LOCKED "15\r\n"
42 #define INVALID_CODE "16\r\n"
43 #define INVALID_BAUD_RATE "17\r\n"
44 #define INVALID_STOP_BIT "18\r\n"
46 #define CRYSTFREQ "10000"
47 #define RAMOFFSET 0x40000200
51 typedef unsigned char u8;
52 typedef unsigned short u16;
53 typedef unsigned int u32;
55 typedef struct s_lpc {
56 int sfd; /* serial fd */
57 char sdev[128]; /* seriel device */
58 int fwfd; /* fimrware fd */
59 char fwfile[128]; /* firmware file */
60 u8 info; /* info/mode */
61 char freq[8]; /* frequency */
62 u32 roff; /* ram offset of uc */
63 u32 jaddr; /* addr for the jump */
68 printf("possible argv:\n");
69 printf(" -d <serial device>\n");
70 printf(" -f <firmware>\n");
71 printf(" -c <crystal freq>\n");
72 printf(" -r <ram offset>\n");
77 int open_serial_device(t_lpc *lpc) {
81 //memset(&term,0,sizeof(struct termios));
83 /* open serial device */
85 lpc->sfd=open(lpc->sdev,O_RDWR);
91 /* configure the serial device */
93 tcgetattr(lpc->sfd,&term);
95 // input/output baudrate
97 cfsetispeed(&term,B38400);
98 cfsetospeed(&term,B38400);
100 // control options -> 8n1
102 term.c_cflag&=~PARENB; // no parity
103 term.c_cflag&=~CSTOPB; // only 1 stop bit
104 term.c_cflag&=~CSIZE; // no bit mask for data bits
105 term.c_cflag|=CS8; // 8 data bits
107 // line options -> raw input
109 term.c_lflag&=~(ICANON|ECHO|ECHOE|ISIG);
111 // input options -> enable flow control
113 //term.c_iflag&=~(IXON|IXOFF|IXANY|INLCR|ICRNL);
114 term.c_iflag&=~(INLCR|ICRNL|IXANY);
115 term.c_iflag|=(IXON|IXOFF);
121 // more control options -> timeout / flow control
124 term.c_cc[VTIME]=10; // 1 second timeout
125 term.c_cc[VSTART]=0x11;
126 term.c_cc[VSTOP]=0x13;
128 tcsetattr(lpc->sfd,TCSANOW,&term);
133 int open_firmware(t_lpc *lpc) {
135 /* open firmware file */
137 lpc->fwfd=open(lpc->fwfile,O_RDONLY);
145 int txrx(t_lpc *lpc,char *buf,int len,u8 type) {
152 if(lpc->info&VERBOSE)
156 ret=write(lpc->sfd,buf+cnt,len);
158 perror("txrx write");
161 if(lpc->info&VERBOSE)
164 ((buf[cnt+i]>0x19)&(buf[cnt+i]<0x7f))?
169 if(lpc->info&VERBOSE) {
172 printf("%02x ",buf[i]);
173 printf("| (%d)\n",cnt);
176 /* cut the echo if not of type auto baud */
178 if(type!=TXRX_TYPE_BAUD) {
180 ret=read(lpc->sfd,buf,cnt);
182 perror("txrx echo cut");
189 /* return here if type is data */
191 if(type==TXRX_TYPE_DATA)
196 ret=read(lpc->sfd,buf,1);
198 perror("txrx read (first byte)");
216 printf("txrx read: bad return byte '%02x'\n",buf[0]);
223 ret=read(lpc->sfd,buf+1+cnt-i,i);
225 perror("txrx read (next bytes)");
230 if(lpc->info&VERBOSE) {
233 printf("%c",((buf[i]>0x19)&(buf[i]<0x7f))?
237 printf("%02x ",buf[i]);
238 printf("| (%d)\n",cnt+1);
242 /* return if type is go */
244 if(type==TXRX_TYPE_GO)
247 /* check/strip return code if type is cmd */
249 if(type==TXRX_TYPE_CMD) {
250 ret=strlen(CMD_SUCCESS);
251 if(!strncmp(buf,CMD_SUCCESS,ret)) {
257 printf("txrx bad return code!\n");
265 int bl_init(t_lpc *lpc) {
270 /* auto baud sequence */
272 txrx(lpc,buf,1,TXRX_TYPE_BAUD);
273 if(strncmp(buf,"Synchronized\r\n",14)) {
274 printf("auto baud detection failed\n");
278 /* tell bl that we are synchronized (it's allready in buf) */
279 txrx(lpc,buf,14,TXRX_TYPE_SYNC);
280 if(strncmp(buf,"OK\r\n",4)) {
281 printf("sync failed\n");
285 /* tell bl the crystal frequency */
286 len=strlen(lpc->freq)+2;
287 strncpy(buf,lpc->freq,BUFSIZE);
290 txrx(lpc,buf,len,TXRX_TYPE_SYNC);
291 if(strncmp(buf,"OK\r\n",4)) {
292 printf("freq set failed\n");
299 int unlock_go(t_lpc *lpc) {
304 memcpy(buf,"U 23130\r\n",9);
305 ret=txrx(lpc,buf,9,TXRX_TYPE_CMD);
315 snprintf(buf,BUFSIZE,"G %d A\r\n",lpc->jaddr);
317 ret=txrx(lpc,buf,len,TXRX_TYPE_GO);
322 int uuencode(u8 *in,u8 *out,int len) {
325 out[1]=0x20+((in[0]>>2)&0x3f);
326 out[2]=0x20+(((in[0]<<4)|(in[1]>>4))&0x3f);
327 out[3]=0x20+(((in[1]<<2)|(in[2]>>6))&0x3f);
328 out[4]=0x20+(in[2]&0x3f);
333 int write_to_ram(t_lpc *lpc,char *buf,u32 addr,int len) {
337 char txrxbuf[BUFSIZE];
344 printf("ram write: not a multiple of 4\n");
348 /* make it a multiple of 3 (reason: uuencode) */
349 nlen=(!(len%3))?len:((len/3+1)*3);
351 printf("ram write: too much data\n");
354 for(i=len;i<nlen;i++) buf[i]=0;
359 /* prepare write command */
360 if(lpc->info&VERBOSE)
361 printf("writing 0x%02x bytes to 0x%08x\n",len,addr);
362 snprintf(txrxbuf,BUFSIZE,"W %d %d\r\n",addr,len);
363 slen=strlen(txrxbuf);
365 /* send command and check return code */
366 txrx(lpc,txrxbuf,slen,TXRX_TYPE_CMD);
375 /* uuencode / prepare data bytes */
376 uuencode((u8 *)(buf+bcnt),(u8 *)(txrxbuf),
377 (bcnt==nlen-3)?(len%3?len%3:3):3);
382 checksum+=((u8)buf[bcnt]+(u8)buf[bcnt+1]+(u8)buf[bcnt+2]);
384 /* send a data line */
385 txrx(lpc,txrxbuf,7,TXRX_TYPE_DATA);
387 /* increase counters */
393 if((!(lcount%20))|(bcnt==nlen)) {
395 memcpy(txrxbuf,"`\r\n",3);
396 //txrx(lpc,txrxbuf,3,TXRX_TYPE_DATA);
398 snprintf(txrxbuf,BUFSIZE,"%d\r\n",checksum);
399 slen=strlen(txrxbuf);
400 txrx(lpc,txrxbuf,slen,TXRX_TYPE_CKSM);
401 if(!strncmp(txrxbuf,"RESE",4)) {
402 read(lpc->sfd,txrxbuf+4,4);
403 printf("ram write: resending ...\n");
406 if(strncmp(txrxbuf,"OK\r\n",4)) {
407 printf("ram write: bad response\n");
410 /* reset checksum & counter */
420 int firmware_to_ram(t_lpc *lpc) {
430 ret=read(lpc->fwfd,buf,1);
440 printf("fw to ram: no ihex format\n");
444 ret=read(lpc->fwfd,buf,2);
445 sscanf(buf,"%02x",&len);
447 ret=read(lpc->fwfd,buf,4);
448 sscanf(buf,"%04x",&addr);
450 ret=read(lpc->fwfd,buf,2);
451 sscanf(buf,"%02x",&type);
452 /* successfull return if type is end of file */
455 /* read data (and cksum) */
456 ret=read(lpc->fwfd,buf,2*(len+1));
457 if(ret!=(2*(len+1))) {
458 printf("fw to ram: data missing\n");
461 for(ret=0;ret<len;ret++) {
462 sscanf(buf+2*ret,"%02x",&temp);
465 /* act according to type */
468 // /* get cs and ip */
472 printf("fw to ram: invalid len\n");
475 write_to_ram(lpc,buf,addr,len);
478 lpc->roff=((buf[0]<<24)|(buf[1]<<16));
481 lpc->jaddr=((buf[0]<<24)|(buf[1]<<16));
482 lpc->jaddr|=((buf[2]<<8)|buf[3]);
485 printf("fw to ram: unknown type %02x\n",type);
493 int main(int argc,char **argv) {
503 memset(&lpc,0,sizeof(t_lpc));
504 strncpy(lpc.freq,CRYSTFREQ,7);
510 for(i=1;i<argc;i++) {
512 if(argv[i][0]!='-') {
519 strncpy(lpc.sdev,argv[++i],127);
522 strncpy(lpc.fwfile,argv[++i],127);
529 strncpy(lpc.freq,argv[++i],7);
538 /* open serial port */
539 if(open_serial_device(&lpc)<0)
542 /* boot loader init */
543 printf("boot loader init ...\n");
547 /* quit if there is no hex file to process */
548 if(!(lpc.info&FIRMWARE)) {
549 printf("no firmware -> aborting\n");
553 /* open firmware file */
554 if(open_firmware(&lpc)<0)
557 /* parse intel hex file and write to ram */
558 printf("write firmware to ram ...\n");
559 firmware_to_ram(&lpc);
562 printf("unlock go command ...\n");