* functions
*/
-void mmap_init(u8 memtype) {
-
- MEMMAP=memtype;
-}
-
void pll_init(void) {
/* configuration */
continue;
}
-void pause(int cnt) {
+void ext_mem_init(void) {
+
+ /*
+ * flash at bank0 and bank:
+ *
+ * idle clocks between rad & write: 0+1
+ * length of read access: 1+3
+ * bls lines high during write access
+ * length of write access: 0+extra
+ * no write protect, no burst-rom
+ * 16 bit data width
+ *
+ */
+
+ BCFG0=0x10000420; // bank 0
+ BCFG2=0x10000420; // bank 2
+
+ /*
+ * lcd at bank 1:
+ *
+ * idle clocks between rad & write: 2+1
+ * length of read access: 2+3
+ * bls lines low during write access
+ * length of write access: 1+extra
+ * no write protect, no burst-rom
+ * 8 bit data width
+ *
+ */
+
+ BCFG1=0x00000c42; // bank 1
+}
+
+void pin_init(void) {
+
+ /*
+ * pinsel 0
+ *
+ * uart0: tx, rx
+ *
+ */
+
+ PINSEL0=0x00000005;
+
+ /*
+ * pinsel 1
+ *
+ * p0.30: eint3
+ *
+ */
+
+ PINSEL1=0x20000000;
+
+ /*
+ * pin select 2
+ *
+ * orig fw -> d 6 0 4 1 d 4
+ * 1101 0110 0000 0100 0001 1101 0100
+ *
+ * this fw -> d e 0 4 9 d 4
+ * 1101 1110 0000 0100 1001 1101 0100
+ *
+ * differences:
+ *
+ * - p3.26 should be chip select for ext mem bank 1
+ * - p3.0 should be address line 0
+ *
+ * explanation: maybe bcfg1 config implies these settings
+ *
+ */
+
+ //PINSEL2=0xd6041d4;
+ PINSEL2=0xde049d4;
+
+ /*
+ * gpio config
+ *
+ * buttons:
+ *
+ * out: p2.18 - p2.24 (+ pull high)
+ * in: p0.30, p0.{27,28}, p3.{20,21}, p0.22, p0.13
+ *
+ */
+
+ // nothing to do for inputs (default: 0x00000000)
+ IODIR2=((1<<18)|(1<<19)|(1<<20)|(1<<21)|(1<<22)|(1<<23)|(1<<24));
+ IOSET2=((1<<18)|(1<<19)|(1<<20)|(1<<21)|(1<<22)|(1<<23)|(1<<24));
+}
+
+void mmap_init(u8 memtype) {
+
+ if(memtype==MEMTYPE_RESERVED)
+ return;
+
+ MEMMAP=memtype;
+}
+
+void pause(u32 cnt) {
while(cnt--)
+ //continue;
asm volatile ("nop");
}