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fixed output flags in serial init + added listening code after fw write
[my-code/arm.git]
/
betty
/
fwbc.c
diff --git
a/betty/fwbc.c
b/betty/fwbc.c
index
46a342c
..
fecb753
100644
(file)
--- a/
betty/fwbc.c
+++ b/
betty/fwbc.c
@@
-14,21
+14,26
@@
#define P_CLOCK (OSC_CLOCK/P_DIV)
typedef unsigned char u8;
#define P_CLOCK (OSC_CLOCK/P_DIV)
typedef unsigned char u8;
+typedef unsigned int u32;
-void uart0_init(
int
br) {
+void uart0_init(
u32
br) {
- PINSEL0&=~((0x03<<0)|(0x03<<2)); // clear bits 0-3
- PINSEL0|=((1<<0)|(1<<2)); // pin select: tx, rx
+ /* pin select -> tx rx */
+ PINSEL0&=~((1<<0)|(1<<1)|(1<<2)|(1<<3));
+ PINSEL0|=((1<<0)|(1<<2));
- UART0_LCR|=(1<<7); // enable access to divisor
- UART0_DLL=(P_CLOCK/(br*16))&0xff; // set divisor
- UART0_DLL=((P_CLOCK/(br*16))&0xff00)>>8;
- UART0_LCR&=~(1<<7); // disable access to divisor
+ /* divisor */
+ UART0_LCR|=(1<<7);
+ //UART0_DLL=((OSC_CLOCK/(16*br)))&0xff;
+ //UART0_DLM=(((OSC_CLOCK/(16*br)))&0xff00)>>8;
+ UART0_DLL=65;
+ UART0_DLM=0;
- UART0_LCR&=~(0x03<<2); // 1 stop bit, no parity
- UART0_LCR
|=0x03; // 8 data bits
+ /* 8 bit data */
+ UART0_LCR
=((1<<0)|(1<<1));
- UART0_FCR=0x01; // activate fifo
+ /* activate rx tx fifo */
+ UART0_FCR|=((1<<0)|(1<<1)|(1<<2));
}
void uart_send(u8 byte) {
}
void uart_send(u8 byte) {