+void pll_init(void) {
+
+ /* configuration */
+ PLLCFG=0x42; // multiplier = 3 (for cclk), dividor = 4 (for f_cco)
+ PLLCON=0x03; // enable and set as clk source for the lpc
+ /* feed sequence */
+ PLLFEED=0xaa;
+ PLLFEED=0x55;
+ /* wait for lock */
+ while(!(PLLSTAT&(1<<10)))
+ continue;
+}
+
+int flash_sector_erase(u8 flash,u8 sector) {
+
+ u32 a18_12;
+ u32 base;
+
+ if(sector>18)
+ return -1;
+ a18_12=sector_address[sector]<<1;
+
+ if((flash!='0')|(flash!='2'))
+ return -1;
+
+ switch(flash) {
+ case '0':
+ base=0x80000000;
+ B0F555=0xaa;
+ B0F2AA=0x55;
+ B0F555=0x80;
+ B0F555=0xaa;
+ B0F2AA=0x55;
+ *((volatile u16 *)(base|a18_12))=0x30;
+ break;
+ case '2':
+ base=0x82000000;
+ B2F555=0xaa;
+ B2F2AA=0x55;
+ B2F555=0x80;
+ B2F555=0xaa;
+ B2F2AA=0x55;
+ *((volatile u16 *)(base|a18_12))=0x30;
+ break;
+ default:
+ return -1;
+ }
+
+ return 0;
+}
+
+void flash_sector0_erase(void) {
+ B0F555=0xaa;
+ B0F2AA=0x55;
+ B0F555=0x80;
+ B0F555=0xaa;
+ B0F2AA=0x55;
+ *((volatile u16 *)(0x80000000))=0x30;
+}
+
+void flash_chip_erase(void) {
+
+ /* test, erase flash at bank0 */
+
+ B0F555=0xaa;
+ B0F2AA=0x55;
+ B0F555=0x80;
+ B0F555=0xaa;
+ B0F2AA=0x55;
+ B0F555=0x10;
+}
+