+ int ret,len;
+
+ snprintf(buf,BUFSIZE,"G %d A\r\n",lpc->jaddr);
+ len=strlen(buf);
+ ret=txrx(lpc,buf,len,TXRX_TYPE_GO);
+
+ return ret;
+}
+
+int uuencode(u8 *in,u8 *out,int len) {
+
+ out[0]=0x20+len;
+ out[1]=0x20+((in[0]>>2)&0x3f);
+ out[2]=0x20+(((in[0]<<4)|(in[1]>>4))&0x3f);
+ out[3]=0x20+(((in[1]<<2)|(in[2]>>6))&0x3f);
+ out[4]=0x20+(in[2]&0x3f);
+
+ return 0;
+}
+
+int write_to_ram(t_lpc *lpc,char *buf,u32 addr,int len) {
+
+ int lcount;
+ u32 checksum;
+ char txrxbuf[BUFSIZE];
+ int count,bcnt;
+ int nlen,slen;
+ int i;
+
+ /* check length */
+ if(len%4) {
+ printf("ram write: not a multiple of 4\n");
+ return -1;
+ }
+
+ /* make it a multiple of 3 (reason: uuencode) */
+ nlen=(!(len%3))?len:((len/3+1)*3);
+ if(nlen>BUFSIZE) {
+ printf("ram write: too much data\n");
+ return -1;
+ }
+ for(i=len;i<nlen;i++) buf[i]=0;
+
+ /* prepare addr */
+ addr+=lpc->roff;
+
+ /* prepare write command */
+ if(lpc->info&VERBOSE)
+ printf("writing 0x%02x bytes to 0x%08x\n",len,addr);
+ snprintf(txrxbuf,BUFSIZE,"W %d %d\r\n",addr,len);
+ slen=strlen(txrxbuf);
+
+ /* send command and check return code */
+ txrx(lpc,txrxbuf,slen,TXRX_TYPE_CMD);
+
+ /* send data */
+ lcount=0;
+ bcnt=0;
+ count=0;
+ checksum=0;
+ while(bcnt<nlen) {
+
+ /* uuencode / prepare data bytes */
+ uuencode((u8 *)(buf+bcnt),(u8 *)(txrxbuf),
+ (bcnt==nlen-3)?(len%3?len%3:3):3);
+ txrxbuf[5]='\r';
+ txrxbuf[6]='\n';
+
+ /* checksum */
+ checksum+=((u8)buf[bcnt]+(u8)buf[bcnt+1]+(u8)buf[bcnt+2]);
+
+ /* send a data line */
+ txrx(lpc,txrxbuf,7,TXRX_TYPE_DATA);
+
+ /* increase counters */
+ lcount+=1;
+ bcnt+=3;
+ count+=3;
+
+ /* checksum */
+ if((!(lcount%20))|(bcnt==nlen)) {
+ /* send backtick */
+ memcpy(txrxbuf,"`\r\n",3);
+ //txrx(lpc,txrxbuf,3,TXRX_TYPE_DATA);
+ /* send checksum */
+ snprintf(txrxbuf,BUFSIZE,"%d\r\n",checksum);
+ slen=strlen(txrxbuf);
+ txrx(lpc,txrxbuf,slen,TXRX_TYPE_CKSM);
+ if(!strncmp(txrxbuf,"RESE",4)) {
+ read(lpc->sfd,txrxbuf+4,4);
+ printf("ram write: resending ...\n");
+ bcnt-=count;
+ }
+ if(strncmp(txrxbuf,"OK\r\n",4)) {
+ printf("ram write: bad response\n");
+ return -1;
+ }
+ /* reset checksum & counter */
+ checksum=0;
+ count=0;
+ }
+
+ }
+
+ return 0;
+}
+
+int firmware_to_ram(t_lpc *lpc) {
+
+ char buf[BUFSIZE];
+ u32 addr,len,type;
+ int ret,temp;
+
+ /* read a line */
+ ret=1;
+ while(ret) {
+ /* sync line */
+ ret=read(lpc->fwfd,buf,1);
+ switch(buf[0]) {
+ case '\r':
+ continue;
+ case '\n':
+ continue;
+ case ':':
+ /* start code */
+ break;
+ default:
+ printf("fw to ram: no ihex format\n");
+ return -1;
+ }
+ /* read len */
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&len);
+ /* read addr */
+ ret=read(lpc->fwfd,buf,4);
+ sscanf(buf,"%04x",&addr);
+ /* read type */
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&type);
+ /* successfull return if type is end of file */
+ if(type==0x01)
+ return 0;
+ /* read data (and cksum) */
+ ret=read(lpc->fwfd,buf,2*(len+1));
+ if(ret!=(2*(len+1))) {
+ printf("fw to ram: data missing\n");
+ return -1;
+ }
+ for(ret=0;ret<len;ret++) {
+ sscanf(buf+2*ret,"%02x",&temp);
+ buf[ret]=temp;
+ }
+ /* act according to type */
+ switch(type) {
+ //case 0x03:
+ // /* get cs and ip */
+ // break;
+ case 0x00:
+ if(len%4) {
+ printf("fw to ram: invalid len\n");
+ return -1;
+ }
+ write_to_ram(lpc,buf,addr,len);
+ break;
+ case 0x04:
+ lpc->roff=((buf[0]<<24)|(buf[1]<<16));
+ break;
+ case 0x05:
+ lpc->jaddr=((buf[0]<<24)|(buf[1]<<16));
+ lpc->jaddr|=((buf[2]<<8)|buf[3]);
+ break;
+ default:
+ printf("fw to ram: unknown type %02x\n",type);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+int main(int argc,char **argv) {
+
+ t_lpc lpc;
+ int i;
+ int ret;