+SET_HC595:
+
+ ; storage clock -> low
+ cbi PORTB,1
+
+ ; zero to everything ...
+ cbi PORTB,3 ; clear hc595 registers
+ sbi PORTB,1 ; store shift register data
+ cbi PORTB,1 ; release hc595 register clear
+ sbi PORTB,3 ; storage clock -> low
+
+ ; source driver
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,0
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,0
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,1
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,1
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,2
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,2
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,3
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,3
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,4
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,4
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,5
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,5
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,6
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,6
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_source,7
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_source,7
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; sink driver
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,7
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,7
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,6
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,6
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,5
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,5
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,4
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,4
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,3
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,3
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,2
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,2
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,1
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,1
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; clock -> low
+ cbi PORTB,2
+ ; set ser line
+ cbi PORTD,6
+ sbrc hc595_sink,0
+ sbi PORTD,6
+.ifdef DEBUG_PORTS
+ ldi uart_rxtx,0x30
+ sbrc hc595_sink,0
+ ldi uart_rxtx,0x31
+ rcall UART_TX
+.endif
+ ; clock -> high
+ sbi PORTB,2
+
+ ; store to storage register
+ sbi PORTB,1
+
+ ret