#define VERBOSE (1<<0)
#define FIRMWARE (1<<1)
+#define TXRX_TYPE_SYNC 0x00
+#define TXRX_TYPE_CKSM 0x00
#define TXRX_TYPE_BAUD 0x01
-#define TXRX_TYPE_SYNC 0x02
-#define TXRX_TYPE_CMD 0x03
-#define TXRX_TYPE_DATA 0x04
-#define TXRX_TYPE_CKSM 0x05
+#define TXRX_TYPE_CMD 0x02
+#define TXRX_TYPE_DATA 0x03
+#define TXRX_TYPE_GO 0x04
#define CMD_SUCCESS "0\r\n"
#define INVALID_COMMAND "1\r\n"
char fwfile[128]; /* firmware file */
u8 info; /* info/mode */
char freq[8]; /* frequency */
- u32 hoff; /* start addr of ihex file */
u32 roff; /* ram offset of uc */
+ u32 jaddr; /* addr for the jump */
} t_lpc;
void usage(void) {
// input/output baudrate
- cfsetispeed(&term,B9600);
- cfsetospeed(&term,B9600);
+ cfsetispeed(&term,B38400);
+ cfsetospeed(&term,B38400);
// control options -> 8n1
//term.c_iflag&=~(IXON|IXOFF|IXANY|INLCR|ICRNL);
term.c_iflag&=~(INLCR|ICRNL|IXANY);
term.c_iflag|=(IXON|IXOFF);
+
+ // output options
+
+ term.c_oflag=0;
// more control options -> timeout / flow control
int open_firmware(t_lpc *lpc) {
- int ret;
- char buf[BUFSIZE];
-
/* open firmware file */
lpc->fwfd=open(lpc->fwfile,O_RDONLY);
if(lpc->fwfd<0)
perror("fw open");
- /* read hex file offset */
-
- ret=read(lpc->fwfd,buf,7);
- if(buf[0]!=':') {
- printf("fw open: not an intel hex file?\n");
- return -1;
- }
- sscanf(buf+3,"%04x",&(lpc->hoff));
- lseek(lpc->fwfd,0,SEEK_SET);
-
return lpc->fwfd;
}
}
buf[cnt+1]='\0';
+ /* return if type is go */
+
+ if(type==TXRX_TYPE_GO)
+ return 0;
+
/* check/strip return code if type is cmd */
if(type==TXRX_TYPE_CMD) {
char buf[BUFSIZE];
int ret,len;
- snprintf(buf,BUFSIZE,"G %d A\r\n",lpc->roff);
+ snprintf(buf,BUFSIZE,"G %d A\r\n",lpc->jaddr);
len=strlen(buf);
- ret=txrx(lpc,buf,len,TXRX_TYPE_CMD);
+ ret=txrx(lpc,buf,len,TXRX_TYPE_GO);
return ret;
}
for(i=len;i<nlen;i++) buf[i]=0;
/* prepare addr */
- addr+=(lpc->roff-lpc->hoff);
+ addr+=lpc->roff;
/* prepare write command */
if(lpc->info&VERBOSE)
/* read len */
ret=read(lpc->fwfd,buf,2);
sscanf(buf,"%02x",&len);
- if(len%4) {
- printf("fw to ram: len not a multiple of 4\n");
- return -1;
- }
/* read addr */
ret=read(lpc->fwfd,buf,4);
sscanf(buf,"%04x",&addr);
}
/* act according to type */
switch(type) {
- case 0x03:
- /* get cs and ip */
- break;
+ //case 0x03:
+ // /* get cs and ip */
+ // break;
case 0x00:
+ if(len%4) {
+ printf("fw to ram: invalid len\n");
+ return -1;
+ }
write_to_ram(lpc,buf,addr,len);
break;
+ case 0x04:
+ lpc->roff=((buf[0]<<24)|(buf[1]<<16));
+ break;
+ case 0x05:
+ lpc->jaddr=((buf[0]<<24)|(buf[1]<<16));
+ lpc->jaddr|=((buf[2]<<8)|buf[3]);
+ break;
default:
printf("fw to ram: unknown type %02x\n",type);
return -1;
t_lpc lpc;
int i;
+ int ret;
/*
* initial ...
memset(&lpc,0,sizeof(t_lpc));
strncpy(lpc.freq,CRYSTFREQ,7);
lpc.roff=RAMOFFSET;
+ lpc.jaddr=RAMOFFSET;
/* parse argv */
if(open_serial_device(&lpc)<0)
goto end;
- /* open firmware file */
- if(open_firmware(&lpc)<0)
- goto end;
-
/* boot loader init */
printf("boot loader init ...\n");
if(bl_init(&lpc)<0)
return -1;
+ /* quit if there is no hex file to process */
+ if(!(lpc.info&FIRMWARE)) {
+ printf("no firmware -> aborting\n");
+ goto end;
+ }
+
+ /* open firmware file */
+ if(open_firmware(&lpc)<0)
+ goto end;
+
/* parse intel hex file and write to ram */
printf("write firmware to ram ...\n");
firmware_to_ram(&lpc);
/* go! */
printf("go ...\n");
- go(&lpc);
- printf("\n");
+ ret=go(&lpc);
end:
close(lpc.sfd);