#define INVALID_STOP_BIT "18\r\n"
#define CRYSTFREQ "10000"
+#define RAMOFFSET 0x40000200
#define BUFSIZE 128
char freq[8]; /* frequency */
int partid; /* part id */
u8 bcv[2]; /* boot code version */
+ u32 hoff; /* start addr of ihex file */
+ u32 roff; /* ram offset of uc */
} t_lpc;
void usage(void) {
printf(" -d <serial device>\n");
printf(" -f <firmware>\n");
printf(" -c <crystal freq>\n");
+ printf(" -r <ram offset>\n");
printf(" -v\n");
}
int open_firmware(t_lpc *lpc) {
+ int ret;
+ char buf[BUFSIZE];
+
/* open firmware file */
lpc->fwfd=open(lpc->fwfile,O_RDONLY);
if(lpc->fwfd<0)
perror("fw open");
+ /* read hex file offset */
+
+ ret=read(lpc->fwfd,buf,7);
+ if(buf[0]!=':') {
+ printf("fw open: not an intel hex file?\n");
+ return -1;
+ }
+ sscanf(buf+3,"%04x",&(lpc->hoff));
+ lseek(lpc->fwfd,0,SEEK_SET);
+
return lpc->fwfd;
}
}
for(i=len;i<nlen;i++) buf[i]=0;
+ /* prepare addr */
+ addr+=(lpc->roff-lpc->hoff);
+
/* prepare write command */
+ if(lpc->info&VERBOSE)
+ printf("writing %02x bytes to %08x\n",len,addr);
snprintf(txrxbuf,BUFSIZE,"W %d %d\r\n",addr,len);
slen=strlen(txrxbuf);
memset(&lpc,0,sizeof(t_lpc));
strncpy(lpc.freq,CRYSTFREQ,7);
+ lpc.roff=RAMOFFSET;
/* parse argv */
if(open_serial_device(&lpc)<0)
goto end;
+ /* open firmware file */
+ if(open_firmware(&lpc)<0)
+ goto end;
+
/* boot loader init */
printf("boot loader init ...\n");
- bl_init(&lpc);
+ if(bl_init(&lpc)<0)
+ return -1;
/* read part id */
read_part_id(&lpc);
printf("boot code version: %02x %02x\n",lpc.bcv[0],lpc.bcv[1]);
// to be continued ... (parsing fw file and poking it to ram)
- if(open_firmware(&lpc)<0)
- goto end;
firmware_to_ram(&lpc);
end: