; at90s2313
; setup:
+;
; vcc card --- atmel vcc
; vcc cam ---
; rst cam --- atmel int0 (pd2)
.include "../include/2313def.inc"
-; functions by now:
-;
-; stupid mode only by now. just see what cam/card do and redirect
-; this to card/cam.
-;
-; next implementation:
-;
-; try to read one byte of card/cam communication and output via uart.
-; output time information in some way.
-;
-; future:
-;
-; buffer/parse whole strings and decide whether to send to card or not.
; #######
; defines
; sizes
.define uart_data_len 4
-.define uart_data_len_f 3
; names for registers
-.define tmp r16
-.define bitcount r17
-.define tmp1 r18
-.define tmp2 r19
-.define byte r20
-.define overflow_counter r21
-.define counter_l r22
-.define counter_h r23
-.define state r24
-.define state_m r25
-.define mode r26
-.define counter_l_tmp r27
-.define counter_h_tmp r28
-.define address_h r31
-.define address_l r30
-.define one r1
-.define zero r0
+.def tmp = r16
+.def bitcount = r17
+.def tmp1 = r18
+.def tmp2 = r19
+.def byte = r20
+.def overflow_counter = r21
+.def counter_l = r22
+.def counter_h = r23
+.def state = r24
+.def state_m = r25
+.def mode = r26
+.def counter_l_tmp = r27
+.def counter_h_tmp = r28
+.def address_h = r31
+.def address_l = r30
+.def one = r1
+.def zero = r0
; state
.define LOW (1<<0)
reti
; timer/counter overflow 1
-rjmp CLK_OVERFLOW
+rjmp T1_OVERFLOW
; timer/counter overflow 0
reti
INIT:
+; output low on rst to card while init
+sbi DDRD,DDD4
+cbi PORTD,PD4
+
; set stackpointer
ldi tmp,low(RAMEND)
out SPL,tmp
out MCUCR,tmp
; enable t/c overflow interrupt and icp
-ldi tmp,((1<<TOIE1)|(1<<TICIE1))
+ldi tmp,((1<<TOIE1)|(1<<TICIE))
out TIMSK,tmp
; setup t/c and icp
ldi tmp,((1<<CS12)|(1<<CS11)|(1<<CS10)|(1<<ICNC1)|(0<<ICES1))
out UBRR,tmp
sbi UCR,TXEN
+; enable pullups on int0, int1, clk, icp io ports
+ldi tmp,((1<<PD2)|(1<<PD3)|(1<<PD5)|(1<<PD6))
+
; init registers
-ldi bitcounter,0
+ldi bitcount,0
ldi byte,0
ldi overflow_counter,0
-ldi tmp1,0
-ldi tmp2,0
ldi counter_l,0
ldi counter_h,0
ldi state,HIGH ; .. as waiting for falling edge of start bit
ldi state_m,0x03
ldi mode,(STUPID|COOL)
-ldi counter_l_tmp,0
-ldi counter_h_tmp,0
-ldi address_h,SRAM_START_H
+ldi address_h,0
ldi tmp,1
mov one,tmp
ldi tmp,0
; enable interrupts (global)
sei
+; output high on rst to card
+sbi PORTD,PD4
+
; jump to mainloop
rjmp MAIN
REC_CARD:
-; save counter
-In counter_l,ICR1L
-in counter_h,ICR1H
+; input & pullup
+cbi DDRD,DDD6
+sbi PORTD,PD6
; toggle state
eor state,state_m
sbrc mode,STUPID_F
rcall FWD_TO_CAM
-; calculate delta clocks if in stupid mode
+; calculate delta clocks if in cool mode
sbrc mode,COOL_F
-rcall CALC_DELTA_CLOCK ; -> calc delta, store to counter_l_tmp, counter_h_tmp
+rcall CALC_DELTA_CLOCK
; send time and state via uart
sbrc mode,COOL_F
; return
reti
+; ------------------------
+; calc_delta_clock routine
+; ------------------------
+
+CALC_DELTA_CLOCK:
+
+; store counters
+mov counter_l_tmp,counter_l
+mov counter_h_tmp,counter_h
+
+; get new ones
+in counter_l,ICR1L
+in counter_h,ICR1H
+
+; delta calc on host software by now
+
+; return
+ret
+
; ------------------------
; toggle_icp_sense routine
; ------------------------
; toggle according to state
in tmp,TCCR1B
-cbi tmp,ICES1
+cbr tmp,ICES1
sbrs state,HIGH ; maybe toggle according to TCCR1B?
-sbi tmp,ICES1
+sbr tmp,ICES1
out TCCR1B,tmp
; return
out PORTD,tmp1;
; reenable external interrupt 1
-cbr tmp,INT1
+sbr tmp,INT1
out GIMSK,tmp
; return
PREPARE_UART:
-; by now just send state and counter, so there is no data to prepare
+; write transfer data to sram
+ldi address_l,0x60
+st address_l+,counter_l
+st address_l+,counter_h
+st address_l+,overflow_counter
+st address_l+,state
; enable uart data register empty interrupt
sbi UCR,UDRIE
cbi DDRD,DDD3
sbi DDRD,PD3
-; save counter
-in counter_l,ICR1L
-in counter_h,ICR1H
-
; toggle state
eor state,state_m
; toggle int sense
rcall TOGGLE_INT_SENSE
-HIER FEHLT NOCH VIEL ...
+; fwd to card if in stupid mode
+sbrc mode,STUPID_F
+rcall FWD_TO_CARD
+
+; calculate delta clocks if in cool mode
+sbrc mode,COOL_F
+rcall CALC_DELTA_CLOCK
; return
reti
; ------------------------
-: toggle_int_sense routine
+; toggle_int_sense routine
; ------------------------
TOGGLE_INT_SENSE:
in tmp,MCUCR
cbr tmp,ISC10
-sbis state,HIGH_F
+sbrs state,HIGH_F
sbr tmp,ISC10
out MCUCR,tmp
; return
ret
+; -------------------
+; fwd_to_card routine
+; -------------------
+
+FWD_TO_CARD:
+
+; disable icp interrupt while toggling edge
+in tmp,TIMSK
+cbr tmp,TICIE
+out TIMSK,tmp
+
+; output state on port to card
+in tmp1,PORTD
+sbr tmp1,PD6
+sbrs state,HIGH_F
+cbr tmp1,PD6
+
+; configure as output and push-pull low/high
+sbi DDRD,DDD6
+out PORTD,tmp1;
+
+; reenable icp interrupt
+sbr tmp,TICIE
+out TIMSK,tmp
+
+; return
+ret
+
; -------------------
; t1_overflow routine
; -------------------
RST_CAM:
-; pull down rst from card
-sbi DDRD,DDD4
-cbi PORTD,PD4
-
-; jump to init
+; by now just jump to init
rjmp INIT
; ----------------
; disable uart data register empty interrupt
cbi UCR,UDRIE
-; init counter
+; init counter(s)
mov address_l,zero
+mov tmp,zero
; send the data
rcall UART_SEND
; return
reti
-.... wahhh ! zzZz
+; -----------------
+; uart_send routine
+; -----------------
+
+UART_SEND:
+
+; read next byte from memmory and transfer via uart
+sbic USR,UDRE
+rcall UART_GS
+
+; return if everything was sent
+cpi tmp,uart_data_len
+brne UART_SEND
+ret
+
+; ---------------
+; uart_gs routine
+; ---------------
+
+UART_GS:
+
+;
+; wie macht man load mit autoinc richtig?
+;
+
+; read byte from memory and write via uart
+ld tmp1,address_l+
+out UDR,tmp1
+
+; increment counter (maybe needed later)
+add tmp,one
+
+; return
+ret