.def uart_rxtx = r18
.def count = r19
.def state = r20
+.def scount = r21
;
; interrupts
ldi ZL,low(STORAGE)
ldi ZH,high(STORAGE)
+ ldi scount,0
+ ldi tmp1,0x23
+INIT_STORAGE:
+ ; init storage
+ st Z+,tmp1
+ st Z+,tmp1
+ add scount,one
+ cpi scount,55
+ brne INIT_STORAGE
+
+ ; storage pointer again
+ ldi ZL,low(STORAGE)
+ ldi ZH,high(STORAGE)
+
; signal ready output
ldi uart_rxtx,0x72
rcall UART_TX
+DEBUG_PORT:
+ ;rcall UART_RX
+ ;ldi uart_rxtx,0x30
+ ;in tmp1,PIND
+ ;sbrc tmp1,2
+ ;ldi uart_rxtx,0x31
+ ;rcall UART_TX
+ ;rjmp DEBUG_PORT
+
; external interrupt enable
rcall INT0_IR_CONF_INIT
rcall INT0_IR_ENABLE
; reset storage pointer
ldi ZL,low(STORAGE)
ldi ZH,high(STORAGE)
- ldi tmp1,0
+ ldi scount,1
; transmit number of sampled words
mov uart_rxtx,count
TRANSFER_LOOP:
- ; check amount of sent data
- cp tmp1,count
- breq IDLE
-
- ; transmit storage
+ ; send data and counter
ld uart_rxtx,Z+
rcall UART_TX
ld uart_rxtx,Z+
rcall UART_TX
; count sent data
- add tmp1,one
+ add scount,one
+
+ ; check amount of data
+ cpi scount,56
+ breq IDLE
rjmp TRANSFER_LOOP
; inc counter
add count,one
+
+ ; reset timer
+ ldi tmp1,0
+ out TCNT1H,tmp1
+ out TCNT1L,tmp1
; check for left capacity
cpi count,55