From: hackbard Date: Sat, 1 Sep 2007 20:31:22 +0000 (+0200) Subject: betty.c - first test fw to writo to flash bank0 X-Git-Url: https://hackdaworld.org/gitweb/?a=commitdiff_plain;h=2cbc6d2f18a38237fcd1df2ef67ba315af080f03;p=my-code%2Farm.git betty.c - first test fw to writo to flash bank0 --- diff --git a/betty/Makefile b/betty/Makefile index dfd3fee..0af33ac 100644 --- a/betty/Makefile +++ b/betty/Makefile @@ -16,7 +16,7 @@ CROSS_ROM_LDFLAGS = -Tlpc2220_rom.ld -nostartfiles -nostdlib # build objects HOST_TARGET = lpcload fwdump -CROSS_TARGET = fwbc.hex fwflash.hex fwflash.elf # debug: .elf for objdump +CROSS_TARGET = fwbc.hex fwflash.hex betty.hex # all projects all: $(HOST_TARGET) $(CROSS_TARGET) @@ -36,6 +36,10 @@ arm: arm_clean $(CROSS_TARGET) %.elf: %.o startup.o $(CROSS_LD) $(CROSS_RAM_LDFLAGS) startup.o -o $@ $< +# special linker case ... +betty.elf: betty.o startup.o + $(CROSS_LD) $(CROSS_ROM_LDFLAGS) startup.o -o $@ $< + # .hex out of .elf %.hex: %.elf $(CROSS_OBJCOPY) -O ihex $< $@ diff --git a/betty/betty.c b/betty/betty.c index f2ce2e5..68c86f7 100644 --- a/betty/betty.c +++ b/betty/betty.c @@ -5,9 +5,182 @@ * */ +/* + * includes + */ + +#include "lpc2xxx.h" + +/* + * defines + */ + +/* bank 0/2 and boootloader addr/size */ +#define BANK0 0x80000000 +#define BANK2 0x82000000 +#define BANK_SIZE 0x00100000 +#define BOOTLOADER 0x7fffe000 +#define BL_SIZE 0x00002000 + +/* flash cmd addresses - flash[0-18] <--> arm[1-19]*/ +#define B0F555 (*((volatile unsigned short *)(BANK0|0xaaa))) // 0x555 +#define B0F2AA (*((volatile unsigned short *)(BANK0|0x554))) // 0x2aa +#define B0F (*((volatile unsigned short *)(BANK0))) +#define B2F555 (*((volatile unsigned short *)(BANK2|0xaaa))) // 0x555 +#define B2F2AA (*((volatile unsigned short *)(BANK2|0x554))) // 0x2aa +#define B2F (*((volatile unsigned short *)(BANK2))) + +/* + * type definitions + */ + +typedef unsigned char u8; +typedef unsigned short u16; +typedef unsigned int u32; + + /* + * functions + */ + +void mmap_init(u8 memtype) { + + MEMMAP=memtype; +} + +void pll_init(void) { + + /* configuration */ + PLLCFG=0x42; // multiplier = 3 (for cclk), dividor = 4 (for f_cco) + PLLCON=0x03; // enable and set as clk source for the lpc + /* feed sequence */ + PLLFEED=0xaa; + PLLFEED=0x55; + /* wait for lock */ + while(!(PLLSTAT&(1<<10))) + continue; +} + +void ext_mem_bank_init(void) { + + BCFG0=0x10000420; // flash 1 + BCFG1=0x00000c42; // lcd + BCFG2=0x10000420; // flash 2 +} + + +void pin_select_init() { + + /* + * a[19:2] -> address lines + */ + + PINSEL2=0x0d6041d4; +} + +void uart0_init(void) { + + PINSEL0=0x05; // pin select -> tx, rx + UART0_FCR=0x07; // enable fifo + UART0_LCR=0x83; // set dlab + word length + UART0_DLL=0x04; // br: 38400 @ 10/4 mhz + UART0_DLM=0x00; + UART0_LCR=0x03; // unset dlab +} + +void uart0_send_string(char *txbuf) { + + int i; + + i=0; + + while(txbuf[i]) { + UART0_THR=txbuf[i++]; + /* flush if tx buffer maximum reached */ + if(!(i%16)) + while(!(UART0_LSR&(1<<6))) + continue; + } + + /* flush if \n and \r do not fit in the tx buffer */ + if(i>14) + while(!(UART0_LSR&(1<<6))) + continue; + + UART0_THR='\n'; + UART0_THR='\r'; + + /* flush uart0 anyways */ + while(!(UART0_LSR&(1<<6))) + continue; +} + +void uart0_send_buf16(u16 *buf,int len) { + + int i; + + i=0; + + for(i=0;i>8)&0xff; + } +} + +void uart0_send_buf32(u32 *buf,int len) { + + int i; + + i=0; + + for(i=0;i>8)&0xff; + UART0_THR=(buf[i]>>16)&0xff; + UART0_THR=(buf[i]>>24)&0xff; + } +} + +void uart0_send_byte(u8 send) { + + while(!(UART0_LSR&(1<<5))) + continue; + + UART0_THR=send; +} + +u8 uart0_get_byte(void) { + + u8 rx; + + while(!(UART0_LSR&(1<<0))) + continue; + + rx=UART0_RBR; + + return rx; +} + +/* + * main function + */ + int main() { + char buf="betty - live from the flash at 0x80000000! ;)\r\n"; + + pll_init(); + uart0_init(); + ext_mem_bank_init(); + pin_select_init(); + while(1) + uart0_send_string(buf); return 0; } diff --git a/betty/lpc2220_rom.ld b/betty/lpc2220_rom.ld index 11fa38d..1109baa 100644 --- a/betty/lpc2220_rom.ld +++ b/betty/lpc2220_rom.ld @@ -8,9 +8,9 @@ /* memory definitions */ MEMORY { - FLASH_BANK0 (rx) : ORIGIN=0x80000000, LENGTH=0x00100000 - FLASH_BANK2 (rx) : ORIGIN=0x82000000, LENGTH=0x00100000 - RAM (rw) : ORIGIN=0x40000000, LENGTH=0x00010000 + FLASH_BANK0 (rx) : ORIGIN = 0x80000000, LENGTH = 0x00100000 + FLASH_BANK2 (rx) : ORIGIN = 0x82000000, LENGTH = 0x00100000 + RAM (rw) : ORIGIN = 0x40000000, LENGTH = 0x00010000 } /* section definitions */ @@ -19,18 +19,18 @@ SECTIONS { /* startup and user code (.text) */ .text : { - startup.o(.text) // startup code - *(.text) // our code - *(.glue_7) // glue code - *(.glue_7t) // glue code + startup.o(.text) + *(.text) + *(.glue_7) + *(.glue_7t) } > FLASH_BANK0 - . = ALIGN(4) + . = ALIGN(4); /* read only data */ - .rodata : { *(.rodata) } > FLASH_BANK0 + .rodata : { *(.rodata*) } > FLASH_BANK0 - . = ALIGN(4) + . = ALIGN(4); /* initialized data */ .data : { *(.data) } > RAM