From: hackbard Date: Wed, 16 Feb 2011 11:14:35 +0000 (+0100) Subject: basically finished monolyzer project X-Git-Url: https://hackdaworld.org/gitweb/?a=commitdiff_plain;h=a023fa740e46e4cd9c6f6d13349de9629017b654;p=my-code%2Fatmel.git basically finished monolyzer project --- diff --git a/monolyzer/main.asm b/monolyzer/main.asm index 97b4d95..b5ed20c 100644 --- a/monolyzer/main.asm +++ b/monolyzer/main.asm @@ -12,7 +12,10 @@ .def tmp1 = r16 .def tmp2 = r17 .def uart_rxtx = r18 -.def count = r19 +.def bcount = r19 +.def scount = r20 +.def data = r21 +.def state = r22 ; ; interrupts @@ -88,15 +91,9 @@ INIT: ; timer0 init rcall TIMER0_INIT - ; timer0 interrupt enable - rcall TIMER0_INT_INIT - ; uart init rcall UART_INIT - ; uart interrupt enable - rcall UART_INT_RX_INIT - ; zero and one initialization ldi tmp1,0 mov zero,tmp1 @@ -108,10 +105,17 @@ INIT: out SPL,tmp1 ; more init - ldi count,0x21 + ldi bcount,0 + ldi scount,0 + ldi data,0x00 + ldi state,1 + + ; storage pointer + ldi ZL,low(STORAGE) + ldi ZH,high(STORAGE) ; signal ready output - ldi uart_rxtx,0x68 + ldi uart_rxtx,0x72 rcall UART_TX ; global interrupt enable @@ -120,17 +124,68 @@ INIT: MAIN: WAIT_FOR_HIGH: - ; start as soon as we get a high signal + ; start as soon as we get a high signal + in tmp1,PORTB + sbrs tmp1,0 rjmp WAIT_FOR_HIGH + ; timer0 interrupt enable + rcall TIMER0_INT_INIT + +SAMPLE: + + ; sample as long as there is storage capacity + sbrs state,0 + rjmp SAMPLE + + ; timer0 interrupt disable + rcall TIMER0_INT_END + + ; signal finish + ldi uart_rxtx,0x66 + rcall UART_TX + +IDLE: + + ; wait for commands via uart + rcall UART_RX + + ; decode instruction + cpi uart_rxtx,0x52 + breq RESET + cpi uart_rxtx,0x54 + breq TRANSFER + + rjmp IDLE + +TRANSFER: + + ; reset storage pointer + ldi ZL,low(STORAGE) + ldi ZH,high(STORAGE) + ldi scount,0 + +TRANSFER_LOOP: + + ; transmit storage + ld uart_rxtx,Z+ + rcall UART_TX + + ; count sent data + add scount,one + + ; check amount of sent data + cpi scount,128 + breq IDLE + + rjmp TRANSFER_LOOP ; include subroutines .include "port.asm" .include "timer.asm" .include "uart.asm" - ; ; interrupt routines ; @@ -138,19 +193,41 @@ WAIT_FOR_HIGH: T0_OVF: ; debug output - cbi PORTD,3 + ; cbi PORTD,3 ; read port - + in tmp1,PORTB + sbrc tmp1,0 + add data,one + + ; increase and check bit counter + add bcount,one + cpi bcount,8 + brne EXIT_T0_OVF + ; store another byte into sram + st Z+,data + ldi bcount,0 + add scount,one + ; check for left capacity + cpi scount,128 + brne EXIT_T0_OVF + ldi state,0 ; debug output - sbi PORTD,3 + ; sbi PORTD,3 + +EXIT_T0_OVF: + + ; shift data bits + ; in any case => there is always a zero at lsb + lsl data reti UART_RECEIVE: + reti @@ -160,6 +237,6 @@ UART_RECEIVE: .dseg -DATA_STORAGE: .byte 8 +STORAGE: .byte 128 diff --git a/monolyzer/timer.asm b/monolyzer/timer.asm index c9ef074..861e9b9 100644 --- a/monolyzer/timer.asm +++ b/monolyzer/timer.asm @@ -16,3 +16,11 @@ TIMER0_INT_INIT: ret +TIMER0_INT_END: + + ; overflow interrupt + ldi tmp1,0x00 + out TIMSK,tmp1 + + ret +