bullshit commit, sync for travel (to zn00H!) :)

[my-code/arm.git] / betty / fwbc.c

diff --git a/betty/fwbc.c b/betty/fwbc.c
index 1694055..1874819 100644 (file)
--- a/betty/fwbc.c
+++ b/betty/fwbc.c
@@ -27,9 +27,10 @@
 #define MMAP_RAM               0x02
 #define MMAP_EXT               0x03
 
-/* band 0/2 addr */
+/* band 0/2 & bootloader addr */
 #define BANK0                  0x80000000
 #define BANK2                  0x82000000
+#define BOOTLOADER             0x7fffe000
 
 /*
  * type definitions
@@ -56,8 +57,9 @@ int main(void) {
 
        /* variables */
 
-       u16 *flash;
-       u32 i;
+       u16 *mem=0;
+       u32 *bl=0;
+       u32 i,len;
        u8 start;
 
        /* memory mapping of interrupt vectors to static ram */
@@ -77,27 +79,65 @@ int main(void) {
 
        /* external memory init */
 
-       //BCFG0=;
-       //BCFG2=;
-       flash=(u16 *)BANK0;
+       BCFG0=0x1000FBEF;               // no boot[1:0] influence? (thnx colibri)
+                                       // BCFG2 should be fine as is
+
+       while(1) {
 
        /* wait for fwdump to send transmit start character */
-       start=0;
-       while(start!=0x23) {
+       start=0x23;
+       while(1) {
                while(!(UART0_LSR&(1<<0)))
                        continue;
                start=UART0_RBR;
+               if(start=='0') {
+                       mem=(u16 *)BANK0;
+                       len=0x80000;
+                       break;
+               }
+               if(start=='2') {
+                       mem=(u16 *)BANK2;
+                       len=0x80000;
+                       break;
+               }
+               if(start=='b') {
+                       BCFG0=0x1000FBEF;       // 32 bit width
+                       bl=(u32 *)BOOTLOADER;
+                       len=0x800;
+                       break;
+               }
        }
 
        /* transmit 1 mb of data */
-       for(i=0;i<524288;i++) {
+       for(i=0;i<len;i++) {                    // care for endianness
+
                while(!(UART0_LSR&(1<<5)))
                        continue;
-               UART0_THR=((*flash&0xff00)>>8);
+               if(start=='b')
+                       UART0_THR=(*bl&0xff);
+               else
+                       UART0_THR=(*mem&0xff);
+
                while(!(UART0_LSR&(1<<5)))
                        continue;
-               UART0_THR=(*flash&0xff);
-               flash++;
+               if(start=='b')
+                       UART0_THR=((*bl&0xff00)>>8);
+               else {
+                       UART0_THR=((*mem&0xff00)>>8);
+                       mem++;
+               }
+
+               if(start=='b') {
+                       while(!(UART0_LSR&(1<<5)))
+                               continue;
+                       UART0_THR=((*bl&0xff0000)>>16);
+                       while(!(UART0_LSR&(1<<5)))
+                               continue;
+                       UART0_THR=((*bl&0xff000000)>>24);
+                       bl++;
+               }
+       }
+
        }
 
        return 0;