#define TXRX_TYPE_SYNC 0x02
#define TXRX_TYPE_CMD 0x03
#define TXRX_TYPE_DATA 0x04
+#define TXRX_TYPE_CKSM 0x05
#define CMD_SUCCESS "0\r\n"
#define INVALID_COMMAND "1\r\n"
#define INVALID_STOP_BIT "18\r\n"
#define CRYSTFREQ "10000"
+#define RAMOFFSET 0x40000200
-#define BUFSIZE 64
+#define BUFSIZE 128
typedef unsigned char u8;
+typedef unsigned short u16;
+typedef unsigned int u32;
typedef struct s_lpc {
int sfd; /* serial fd */
char freq[8]; /* frequency */
int partid; /* part id */
u8 bcv[2]; /* boot code version */
+ u32 hoff; /* start addr of ihex file */
+ u32 roff; /* ram offset of uc */
} t_lpc;
void usage(void) {
printf(" -d <serial device>\n");
printf(" -f <firmware>\n");
printf(" -c <crystal freq>\n");
+ printf(" -r <ram offset>\n");
printf(" -v\n");
}
term.c_lflag&=~(ICANON|ECHO|ECHOE|ISIG);
- // input options -> disable flow control
+ // input options -> enable flow control
- term.c_iflag&=~(IXON|IXOFF|IXANY);
+ //term.c_iflag&=~(IXON|IXOFF|IXANY|INLCR|ICRNL);
+ term.c_iflag&=~(INLCR|ICRNL);
+ term.c_iflag|=(IXON|IXOFF|IXANY);
- // more control options -> timeout
+ // more control options -> timeout / flow control
term.c_cc[VMIN]=0;
term.c_cc[VTIME]=10; // 1 second timeout
+ term.c_cc[VSTART]=0x11;
+ term.c_cc[VSTOP]=0x13;
tcsetattr(lpc->sfd,TCSANOW,&term);
int open_firmware(t_lpc *lpc) {
+ int ret;
+ char buf[BUFSIZE];
+
/* open firmware file */
lpc->fwfd=open(lpc->fwfile,O_RDONLY);
if(lpc->fwfd<0)
perror("fw open");
+ /* read hex file offset */
+
+ ret=read(lpc->fwfd,buf,7);
+ if(buf[0]!=':') {
+ printf("fw open: not an intel hex file?\n");
+ return -1;
+ }
+ sscanf(buf+3,"%04x",&(lpc->hoff));
+ lseek(lpc->fwfd,0,SEEK_SET);
+
return lpc->fwfd;
}
-int txrx(t_lpc *lpc,u8 *buf,int len,u8 type) {
+int txrx(t_lpc *lpc,char *buf,int len,u8 type) {
int ret,cnt;
int i;
len-=ret;
cnt+=ret;
}
- if(lpc->info&VERBOSE)
- printf(" (%d)\n",cnt);
+ if(lpc->info&VERBOSE) {
+ printf(" | ");
+ for(i=0;i<cnt;i++)
+ printf("%02x ",buf[i]);
+ printf("| (%d)\n",cnt);
+ }
/* cut the echo if not of type auto baud */
if(type!=TXRX_TYPE_BAUD) {
- while(cnt) {
+ while(cnt>0) {
ret=read(lpc->sfd,buf,cnt);
if(ret<0) {
perror("txrx echo cut");
return ret;
}
+ if(type==TXRX_TYPE_CKSM) {
+ printf(" cksm resp: ");
+ for(i=0;i<ret;i++)
+ printf("%02x ",buf[i]);
+ printf("\n");
+ }
+ for(i=0;i<ret;i++) {
+ if(buf[i]==0x13)
+ printf("STOP !!!\n");
+ }
cnt-=ret;
}
}
/* return here if type is data */
- if(type==TXRX_TYPE_DATA)
+ if(type==TXRX_TYPE_DATA) {
+ ret=1;
+ while(ret) {
+ ret=read(lpc->sfd,buf,BUFSIZE);
+ for(i=0;i<ret;i++) {
+ if(buf[i]!='\n') {
+ printf("FATAL!!!\n");
+ int j;
+ for(j=0;j<ret;j++) printf("%02x ",buf[j]);
+ printf("\n");
+ }
+ }
+ }
return cnt;
+ }
+
+ /* wait, if cksum has to be verified */
+
+ //if(type==TXRX_TYPE_CKSM)
+ // sleep(3);
/* read */
printf(" << ");
ret=1;
cnt=0;
- while(ret>0) {
+ while(ret) {
ret=read(lpc->sfd,buf+cnt,BUFSIZE-cnt);
if(ret<0) {
perror("txrx read");
buf[cnt+i]:'.');
cnt+=ret;
}
- if(lpc->info&VERBOSE)
- printf(" (%d)\n",cnt);
+ if(lpc->info&VERBOSE) {
+ printf(" | ");
+ for(i=0;i<cnt;i++)
+ printf("%02x ",buf[i]);
+ printf("| (%d)\n",cnt);
+ }
buf[cnt]='\0';
- /* check/strip return code if type is data */
+ /* check/strip return code if type is cmd */
if(type==TXRX_TYPE_CMD) {
ret=strlen(CMD_SUCCESS);
int bl_init(t_lpc *lpc) {
- u8 buf[BUFSIZE];
+ char buf[BUFSIZE];
int len;
/* auto baud sequence */
buf[0]='?';
txrx(lpc,buf,1,TXRX_TYPE_BAUD);
- if(strncmp(buf,"Synchronized\r\n",14)) {
+ if(strncmp(buf,"Synchronized",12)) {
printf("auto baud detection failed\n");
return -1;
}
int read_part_id(t_lpc *lpc) {
- u8 buf[BUFSIZE];
+ char buf[BUFSIZE];
memcpy(buf,"J\r\n",3);
txrx(lpc,buf,3,TXRX_TYPE_CMD);
int read_bcv(t_lpc *lpc) {
- u8 buf[BUFSIZE];
+ char buf[BUFSIZE];
char *ptr;
memcpy(buf,"K\r\n",3);
return 0;
}
-int uuencode(u8 *in,u8 *out) {
+int unlock_go(t_lpc *lpc) {
+
+ char buf[BUFSIZE];
+ int ret;
+
+ memcpy(buf,"U 23130\r\n",9);
+ ret=txrx(lpc,buf,9,TXRX_TYPE_CMD);
+
+ return ret;
+}
+
+int go(t_lpc *lpc) {
+
+ char buf[BUFSIZE];
+ int ret,len;
+
+ snprintf(buf,BUFSIZE,"G %d A\r\n",lpc->roff);
+ len=strlen(buf);
+ ret=txrx(lpc,buf,ret,TXRX_TYPE_CMD);
+
+ return ret;
+}
+
+int uuencode(char *in,char *out) {
+
+ int i;
out[0]=0x20+((in[0]>>2)&0x3f);
out[1]=0x20+(((in[0]<<4)|(in[1]>>4))&0x3f);
out[2]=0x20+(((in[1]<<2)|(in[2]>>6))&0x3f);
out[3]=0x20+(in[2]&0x3f);
+ printf(" enc: ");
+ for(i=0;i<3;i++)
+ printf("%02x ",in[i]);
+ printf("-> ");
+ for(i=0;i<4;i++)
+ printf("%02x ",out[i]);
+ printf("\n");
+
return 0;
}
-int write_to_ram(t_lpc *lpc,u8 *buf,int addr,int len) {
+int write_to_ram(t_lpc *lpc,char *buf,u32 addr,int len) {
int lcount;
- u8 checksum;
- u8 txrxbuf[BUFSIZE];
+ u32 checksum;
+ char txrxbuf[BUFSIZE];
int count,bcnt;
int nlen,slen;
int i;
}
for(i=len;i<nlen;i++) buf[i]=0;
+ /* prepare addr */
+ addr+=(lpc->roff-lpc->hoff);
+
/* prepare write command */
- snprintf(txrxbuf,BUFSIZE,"W %d %d",addr,len);
+ if(lpc->info&VERBOSE)
+ printf("writing 0x%02x bytes to 0x%08x\n",len,addr);
+ snprintf(txrxbuf,BUFSIZE,"W %d %d\r\n",addr,len);
slen=strlen(txrxbuf);
- txrxbuf[slen]='\r';
- txrxbuf[slen+1]='\0';
- slen+=2;
/* send command and check return code */
txrx(lpc,txrxbuf,slen,TXRX_TYPE_CMD);
- if(strncmp(txrxbuf,"OK\r\n",4)) {
- printf("ram write: write command failed\n");
- return -1;
- }
+ //if(strncmp(txrxbuf,"OK\r\n",4)) {
+ // printf("ram write: write command failed\n");
+ // return -1;
+ //}
/* send data */
lcount=0;
/* uuencode / prepare data bytes */
uuencode(buf+bcnt,txrxbuf);
- txrxbuf[4]='\0';
- txrxbuf[5]='\0';
+ txrxbuf[4]='\r';
+ txrxbuf[5]='\n';
/* checksum */
- checksum+=(buf[0]+buf[1]+buf[2]);
+ checksum+=(buf[bcnt]+buf[bcnt+1]+buf[bcnt+2]);
+ printf("----> %d %d\n",checksum,bcnt);
/* send a data line */
txrx(lpc,txrxbuf,6,TXRX_TYPE_DATA);
count+=3;
/* checksum */
- if(!(lcount%20)) {
+ if((!(lcount%20))|(bcnt==nlen)) {
/* send checksum */
- txrxbuf[0]=checksum;
- txrx(lpc,txrxbuf,1,TXRX_TYPE_CMD);
+ snprintf(txrxbuf,BUFSIZE,"%d\r\n",checksum%0x100);
+ slen=strlen(txrxbuf);
+ txrx(lpc,txrxbuf,slen,TXRX_TYPE_CKSM);
if(!strncmp(txrxbuf,"RESEND\r\n",8)) {
printf("ram write: resending ...\n");
bcnt-=count;
int firmware_to_ram(t_lpc *lpc) {
-
+ char buf[BUFSIZE];
+ u32 addr,len,type;
+ int ret;
+
+ /* read a line */
+ while(ret) {
+ /* sync line */
+ ret=read(lpc->fwfd,buf,1);
+ switch(buf[0]) {
+ case '\r':
+ continue;
+ case '\n':
+ continue;
+ case ':':
+ /* start code */
+ break;
+ default:
+ printf("fw to ram: no ihex format\n");
+ return -1;
+ }
+ /* read len */
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&len);
+ if(len%4) {
+ printf("fw to ram: len not a multiple of 4\n");
+ return -1;
+ }
+ /* read addr */
+ ret=read(lpc->fwfd,buf,4);
+ sscanf(buf,"%04x",&addr);
+ /* read type */
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&type);
+ /* successfull return if type is end of file */
+ if(type==0x01)
+ return 0;
+ /* read data */
+ ret=read(lpc->fwfd,buf,2*len);
+ if(ret!=(2*len)) {
+ printf("fw to ram: data missing\n");
+ return -1;
+ }
+ /* checksum */
+ ret=read(lpc->fwfd,buf,2);
+ /* act according to type */
+ switch(type) {
+ case 0x03:
+ /* get cs and ip */
+ break;
+ case 0x00:
+ write_to_ram(lpc,buf,addr,len);
+ break;
+ default:
+ printf("fw to ram: unknown type %02x\n",type);
+ return -1;
+ }
+ }
return 0;
}
memset(&lpc,0,sizeof(t_lpc));
strncpy(lpc.freq,CRYSTFREQ,7);
+ lpc.roff=RAMOFFSET;
/* parse argv */
if(open_serial_device(&lpc)<0)
goto end;
+ /* open firmware file */
+ if(open_firmware(&lpc)<0)
+ goto end;
+
/* boot loader init */
printf("boot loader init ...\n");
- bl_init(&lpc);
+ if(bl_init(&lpc)<0)
+ return -1;
/* read part id */
read_part_id(&lpc);
read_bcv(&lpc);
printf("boot code version: %02x %02x\n",lpc.bcv[0],lpc.bcv[1]);
- // to be continued ... (parsing fw file and poking it to ram)
- if(open_firmware(&lpc)<0)
- goto end;
+ /* parse intel hex file and write to ram */
firmware_to_ram(&lpc);
+ /* unlock go cmd */
+ unlock_go(&lpc);
+
+ /* go! */
+ go(&lpc);
+
end:
close(lpc.sfd);
close(lpc.fwfd);