#define TXRX_TYPE_BAUD 0x01
#define TXRX_TYPE_SYNC 0x02
-#define TXRX_TYPE_DATA 0x03
+#define TXRX_TYPE_CMD 0x03
+#define TXRX_TYPE_DATA 0x04
#define CMD_SUCCESS "0\r\n"
#define INVALID_COMMAND "1\r\n"
#define INVALID_STOP_BIT "18\r\n"
#define CRYSTFREQ "10000"
+#define RAMOFFSET 0x40000200
-#define BUFSIZE 64
+#define BUFSIZE 128
typedef unsigned char u8;
+typedef unsigned short u16;
+typedef unsigned int u32;
typedef struct s_lpc {
int sfd; /* serial fd */
char freq[8]; /* frequency */
int partid; /* part id */
u8 bcv[2]; /* boot code version */
+ u32 hoff; /* start addr of ihex file */
+ u32 roff; /* ram offset of uc */
} t_lpc;
void usage(void) {
printf(" -d <serial device>\n");
printf(" -f <firmware>\n");
printf(" -c <crystal freq>\n");
+ printf(" -r <ram offset>\n");
printf(" -v\n");
}
int open_firmware(t_lpc *lpc) {
+ int ret;
+ char buf[BUFSIZE];
+
/* open firmware file */
lpc->fwfd=open(lpc->fwfile,O_RDONLY);
if(lpc->fwfd<0)
perror("fw open");
+ /* read hex file offset */
+
+ ret=read(lpc->fwfd,buf,7);
+ if(buf[0]!=':') {
+ printf("fw open: not an intel hex file?\n");
+ return -1;
+ }
+ sscanf(buf+3,"%04x",&(lpc->hoff));
+ lseek(lpc->fwfd,0,SEEK_SET);
+
return lpc->fwfd;
}
}
}
+ /* return here if type is data */
+
+ if(type==TXRX_TYPE_DATA)
+ return cnt;
+
/* read */
if(lpc->info&VERBOSE)
}
if(lpc->info&VERBOSE)
printf(" (%d)\n",cnt);
- len=cnt;
buf[cnt]='\0';
/* check/strip return code if type is data */
- if(type==TXRX_TYPE_DATA) {
+ if(type==TXRX_TYPE_CMD) {
ret=strlen(CMD_SUCCESS);
if(!strncmp(buf,CMD_SUCCESS,ret)) {
for(i=ret;i<cnt;i++)
char buf[BUFSIZE];
memcpy(buf,"J\r\n",3);
- txrx(lpc,buf,3,TXRX_TYPE_DATA);
+ txrx(lpc,buf,3,TXRX_TYPE_CMD);
lpc->partid=atoi(buf);
return lpc->partid;
char *ptr;
memcpy(buf,"K\r\n",3);
- txrx(lpc,buf,3,TXRX_TYPE_DATA);
+ txrx(lpc,buf,3,TXRX_TYPE_CMD);
ptr=strtok(buf,"\r\n");
lpc->bcv[0]=strtol(ptr,NULL,16);
ptr=strtok(NULL,"\r\n");
return 0;
}
+int uuencode(u8 *in,char *out) {
+
+ out[0]=0x20+((in[0]>>2)&0x3f);
+ out[1]=0x20+(((in[0]<<4)|(in[1]>>4))&0x3f);
+ out[2]=0x20+(((in[1]<<2)|(in[2]>>6))&0x3f);
+ out[3]=0x20+(in[2]&0x3f);
+
+ return 0;
+}
+
+int write_to_ram(t_lpc *lpc,u8 *buf,u32 addr,int len) {
+
+ int lcount;
+ u32 checksum;
+ char txrxbuf[BUFSIZE];
+ int count,bcnt;
+ int nlen,slen;
+ int i;
+
+ /* check length */
+ if(len%4) {
+ printf("ram write: not a multiple of 4\n");
+ return -1;
+ }
+
+ /* make it a multiple of 3 (reason: uuencode) */
+ nlen=(len/3+1)*3;
+ if(nlen>BUFSIZE) {
+ printf("ram write: too much data\n");
+ return -1;
+ }
+ for(i=len;i<nlen;i++) buf[i]=0;
+
+ /* prepare addr */
+ addr+=(lpc->roff-lpc->hoff);
+
+ /* prepare write command */
+ if(lpc->info&VERBOSE)
+ printf("writing %02x bytes to %08x\n",len,addr);
+ snprintf(txrxbuf,BUFSIZE,"W %d %d\r\n",addr,len);
+ slen=strlen(txrxbuf);
+
+ /* send command and check return code */
+ txrx(lpc,txrxbuf,slen,TXRX_TYPE_CMD);
+ if(strncmp(txrxbuf,"OK\r\n",4)) {
+ printf("ram write: write command failed\n");
+ return -1;
+ }
+
+ /* send data */
+ lcount=0;
+ bcnt=0;
+ count=0;
+ checksum=0;
+ while(bcnt<nlen) {
+
+ /* uuencode / prepare data bytes */
+ uuencode(buf+bcnt,txrxbuf);
+ txrxbuf[4]='\0';
+ txrxbuf[5]='\0';
+
+ /* checksum */
+ checksum+=(buf[0]+buf[1]+buf[2]);
+
+ /* send a data line */
+ txrx(lpc,txrxbuf,6,TXRX_TYPE_DATA);
+
+ /* increase counters */
+ lcount+=1;
+ bcnt+=3;
+ count+=3;
+
+ /* checksum */
+ if((!(lcount%20))|(bcnt==nlen)) {
+ /* send checksum */
+ snprintf(txrxbuf,BUFSIZE,"%d\r\n",checksum);
+ slen=strlen(txrxbuf);
+ txrx(lpc,txrxbuf,slen,TXRX_TYPE_CMD);
+ if(!strncmp(txrxbuf,"RESEND\r\n",8)) {
+ printf("ram write: resending ...\n");
+ bcnt-=count;
+ }
+ if(strncmp(txrxbuf,"OK\r\n",4)) {
+ printf("ram write: bad response\n");
+ return -1;
+ }
+ /* reset checksum & counter */
+ checksum=0;
+ count=0;
+ }
+
+ }
+
+ return 0;
+}
+
+int firmware_to_ram(t_lpc *lpc) {
+
+ char buf[BUFSIZE];
+ u8 data[BUFSIZE];
+ u32 addr,len,type,val;
+ u8 cksum;
+ int ret,i;
+
+ /* read a line */
+ while(ret) {
+ /* sync line */
+ ret=read(lpc->fwfd,buf,1);
+ switch(buf[0]) {
+ case '\r':
+ continue;
+ case '\n':
+ continue;
+ case ':':
+ /* start code */
+ break;
+ default:
+ printf("fw to ram: no ihex format\n");
+ return -1;
+ }
+ /* read len */
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&len);
+ if(len%4) {
+ printf("fw to ram: len not a multiple of 4\n");
+ return -1;
+ }
+ /* read addr */
+ ret=read(lpc->fwfd,buf,4);
+ sscanf(buf,"%04x",&addr);
+ /* read type */
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&type);
+ /* successfull return if type is end of file */
+ if(type==0x01)
+ return 0;
+ /* read data */
+ ret=read(lpc->fwfd,buf,2*len);
+ if(ret!=(2*len)) {
+ printf("fw to ram: data missing\n");
+ return -1;
+ }
+ /* checksum */
+ cksum=0;
+ for(i=0;i<len;i++) {
+ sscanf(buf+2*i,"%02x",&val);
+ data[i]=val;
+ cksum+=data[i];
+ }
+ ret=read(lpc->fwfd,buf,2);
+ sscanf(buf,"%02x",&val);
+ if(val+cksum!=0x100) {
+ printf("fw to ram: wrong checksum\n");
+ return -1;
+ }
+ /* act according to type */
+ switch(type) {
+ case 0x03:
+ /* get cs and ip */
+ break;
+ case 0x00:
+ write_to_ram(lpc,data,addr,len);
+ break;
+ default:
+ printf("fw to ram: unknown type %02x\n",type);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
int main(int argc,char **argv) {
t_lpc lpc;
memset(&lpc,0,sizeof(t_lpc));
strncpy(lpc.freq,CRYSTFREQ,7);
+ lpc.roff=RAMOFFSET;
/* parse argv */
}
/* open serial port */
- open_serial_device(&lpc);
+ if(open_serial_device(&lpc)<0)
+ goto end;
+
+ /* open firmware file */
+ if(open_firmware(&lpc)<0)
+ goto end;
/* boot loader init */
printf("boot loader init ...\n");
- bl_init(&lpc);
+ if(bl_init(&lpc)<0)
+ return -1;
/* read part id */
read_part_id(&lpc);
printf("boot code version: %02x %02x\n",lpc.bcv[0],lpc.bcv[1]);
// to be continued ... (parsing fw file and poking it to ram)
+ firmware_to_ram(&lpc);
-//end:
+end:
close(lpc.sfd);
+ close(lpc.fwfd);
return 0;
}
projects / my-code / arm.git / blobdiff