X-Git-Url: https://hackdaworld.org/gitweb/?p=my-code%2Farm.git;a=blobdiff_plain;f=betty%2Finterrupts.c;h=df99354c84c4cebb60bca5c0d15f8363e61db589;hp=49ea0cdc488a81017170096921be0bea8aee2481;hb=8ec47a7e5b5658c93eeed6776685cb05ae942fdf;hpb=a409cb5b36482767f766ec9efc5dbecaa2274660

diff --git a/betty/interrupts.c b/betty/interrupts.c
index 49ea0cd..df99354 100644
--- a/betty/interrupts.c
+++ b/betty/interrupts.c
@@ -6,6 +6,7 @@
  */
 
 #include "interrupts.h"
+#include "functions.h"
 
 // 'module global' interrupt variable
 static t_interrupt interrupt;
@@ -14,11 +15,13 @@ static t_interrupt interrupt;
  * functions
  */
 
+// generaal interrupt handling
+
 void interrupt_init(void) {
 
-	memset(&interrupt,0,sizeof(t_interrupt));
-	VICSoftIntClear=0xff;
-	VICIntEnClear=0xff;
+	interrupt.default_soft_callback=0;
+	VICSoftIntClr=0xffffffff;
+	VICIntEnClr=0xffffffff;
 	VICDefVectAddr=0;
 }
 
@@ -29,12 +32,17 @@ void interrupt_set_default_callback(u32 callback_addr) {
 
 void interrupt_set_soft_callback(void (*callback)(void)) {
 
-	interrupt->default_soft_callback=callback;
+	interrupt.default_soft_callback=callback;
+}
+
+void interrupt_set_fiq_callback(void (*callback)(void)) {
+
+	interrupt.fiq_callback=callback;
 }
 
 void interrupt_soft_clear(u8 src_number) {
 
-	VICSoftIntClear=(1<<src_number);
+	VICSoftIntClr=(1<<src_number);
 }
 void interrupt_clear(u8 src_number) {
 
@@ -42,14 +50,14 @@ void interrupt_clear(u8 src_number) {
 	u32 *addr;
 	u32 *cntl;
 
-	VICIntEnClear=(1<<src_number);
+	VICIntEnClr=(1<<src_number);
 	VICIntSelect&=~(1<<src_number);
 
-	addr=&VICVectAddr0;
-	cntl=&VICVectCntl0;
+	addr=(u32 *)&VICVectAddr0;
+	cntl=(u32 *)&VICVectCntl0;
 
 	for(cnt=0;cnt<INTERRUPT_MAX_VIC;cnt++) {
-		if(cntl[cnt]&0x1f==src_number) {
+		if((cntl[cnt]&0x1f)==src_number) {
 			*((volatile u32 *)(addr+cnt))=0;
 			*((volatile u32 *)(cntl+cnt))=0;
 		}
@@ -61,37 +69,67 @@ void interrupt_soft_enable(u8 src_number) {
 	VICSoftInt=(1<<src_number);
 }
 
-int interrupt_enable(u8 src_number,u8 mode,u8 priority,u32 callback_addr) {
+int interrupt_enable(u8 src_number,u8 mode,u8 prio,u32 callback_addr) {
 
 	u32 *addr;
 	u32 *cntl;
 
-	addr=&VICVectAddr0;
-	cntl=&VICVectCntl0;
+	addr=(u32 *)&VICVectAddr0;
+	cntl=(u32 *)&VICVectCntl0;
 
 	/* check whether this ir source is allready assigned */
 	if(VICIntEnable&(1<<src_number))
 		return INTERRUPT_USED;
 
-	/* force interrupt */
-	VICIntEnable=(1<<src_number);
-
+	/* prepare depending on mode */
 	switch(mode) {
 		case INTERRUPT_MODE_FIQ:
 			VICIntSelect|=(1<<src_number);
 			break;
 		case INTERRUPT_MODE_VIRQ:
-			if(addr[p]&0x3f)
-				return INTERRUP_PRIORITY_USED;
-			*((volatile u32 *)(addr+p))=callback_addr;
-			*((volatile u32 *)(cntl+p))=src_number&0x1f+(1<<5);
+			if(addr[prio]&0x3f)
+				return INTERRUPT_PRIORITY_USED;
+			*((volatile u32 *)(addr+prio))=callback_addr;
+			*((volatile u32 *)(cntl+prio))=(src_number&0x1f)+0x20;
 		case INTERRUPT_MODE_IRQ:
-		case default:
+		default:
+			break;
 	}
 
+	/* force interrupt */
+	VICIntEnable=(1<<src_number);
+
 	return INTERRUPT_SET;
 }
 
+int interrupt_change_callback(u8 src_number,u32 callback) {
+
+	int i;
+	u32 *addr,*cntl;
+
+	cntl=(u32 *)&VICVectCntl0;
+	addr=(u32 *)&VICVectAddr0;
+
+	i=0;
+	while(i<INTERRUPT_MAX_VIC) {
+		if((*cntl&0x1f)==src_number) {
+			*(addr+i)=callback;
+			return INTERRUPT_CALLBACK_CHANGED;
+		}
+		i++;
+	}
+
+	return INTERRUPT_SRC_NOT_USED;
+}
+
+void interrupt_ack(void) {
+
+	VICVectAddr=0;
+}
+
+// specific interrupt handling
+
+// external interrupts
 void interrupt_ext_ir_config(u8 eint,u8 wakeup,u8 mode,u8 polarity) {
 
 	if(eint>3)
@@ -102,7 +140,109 @@ void interrupt_ext_ir_config(u8 eint,u8 wakeup,u8 mode,u8 polarity) {
 
 	EXTMODE=(EXTMODE&0xf)|(mode<<eint);
 	EXTPOLAR=(EXTPOLAR&0xf)|(polarity<<eint);
-	EXTINT=(EXTINT&0xf)|(1<<eint);
+}
+
+void interrupt_ext_ir_set(u8 eint) {
+
+	if(eint>3)
+		return;
+
+	EXTINT=(1<<eint);
+}
+
+// timer counter interrupts
+void interrupt_tc_config(u8 tcnum,u8 mode,u8 cap,u32 psv) {
+
+	if(tcnum>1)
+		return;
+
+	if(tcnum==0) {
+		T0TCR=0x03;
+		T0CTCR=mode|(cap<<2);
+		T0PR=psv;
+	}
+	else {
+		T1TCR=0x03;
+		T1CTCR=mode|(cap<<2);
+		T1PR=psv;
+	}
+}
+
+void interrupt_tc_match_config(u8 tcnum,u8 mnum,u32 val,u8 mode) {
+
+	u32 *mraddr;
+
+	if(tcnum>1)
+		return;
+
+	if(mnum>3)
+		return;
+
+	if(tcnum==0) {
+		T0MCR=(T0MCR&0x0fff)|(mode<<(3*mnum));
+		mrddr=&T0MR0
+	}
+	else {
+		T1MCR=(T1MCR&0x0fff)|(mode<<(3*mnum));
+		mrddr=&T1MR0
+	}
+
+	mraddr[mnum]=val;
+}
+
+void interrupt_tc_capt_config(u8 tcnum,u8 cnum,u8 mode) {
+
+	if(tcnum>1)
+		return;
+
+	if(cnum>3)
+		return;
+
+	if(tcnum==0)
+		T0CCR=(T0CCR&0x0fff)|(mode<<(3*cnum));
+	else
+		T1CCR=(T1CCR&0x0fff)|(mode<<(3*cnum));
+}
+
+void interrupt_tc_ir_set(u8 tcnum,u8 tcmc) {
+
+	if(tcnum>1)
+		return;
+
+	if(tcnum==0) {
+		T0IR=tcmc;
+		T0TCR=0x01;
+	}
+	else {
+		T1IR=tcmc;
+		T1TCR=0x01;
+	}
+}
+
+// pwm interrupts
+void interrupt_pwm_set_rate(u32 rate) {
+
+	PWMMR0=rate;
+}
+
+void interrupt_pwm_match_config(u8 mnum,u8 op,u8 mode,u32 val1,u32 val2) {
+
+	u32 *addr=&PWMR0;
+
+	*((volatile u32 *)(addr+mnum))=mval;
+	PWMMCR=(PWMMCR&0x1fffff)|(mode<<(op*3));
+}
+
+void interrupt_pwm_enable(u8 mode,u32 ps_val) {
+
+	PWMPR=ps_val;
+	PWMTCR=0x0b;
+}
+
+void interrupt_pwm_ir_set(u8 pwm_channel) {
+
+	PWMIR=(pwm_channel&0x0f)|((pwm_channel&0x70)<<4);
+	PWMTCR=0x09;
 }
 
 /*
@@ -134,5 +274,8 @@ void interrupt_handler_data_abort(void) {
 
 // fiq
 void interrupt_handler_fiq(void) {
+
+	if(interrupt.fiq_callback)
+		interrupt.fiq_callback();
 }