+/***********************************************************************\r
+ * \r
+ * lpc2xxx.h: Header file for Philips LPC2xxx series\r
+ * \r
+ ***********************************************************************/\r
+\r
+#ifndef __lpc2xxx_h\r
+#define __lpc2xxx_h\r
+\r
+/* External Memory Controller (EMC) */\r
+#define BCFG0 (*((volatile unsigned long *) 0xFFE00000))\r
+#define BCFG1 (*((volatile unsigned long *) 0xFFE00004))\r
+#define BCFG2 (*((volatile unsigned long *) 0xFFE00008))\r
+#define BCFG3 (*((volatile unsigned long *) 0xFFE0000C))\r
+\r
+/* Vectored Interrupt Controller (VIC) */\r
+#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000))\r
+#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004))\r
+#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008))\r
+#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C))\r
+#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010))\r
+#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014))\r
+#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018))\r
+#define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C))\r
+#define VICProtection (*((volatile unsigned long *) 0xFFFFF020))\r
+#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030))\r
+#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034))\r
+#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100))\r
+#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104))\r
+#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108))\r
+#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C))\r
+#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110))\r
+#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114))\r
+#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118))\r
+#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C))\r
+#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120))\r
+#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124))\r
+#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128))\r
+#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C))\r
+#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130))\r
+#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134))\r
+#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138))\r
+#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C))\r
+#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200))\r
+#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204))\r
+#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208))\r
+#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C))\r
+#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210))\r
+#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214))\r
+#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218))\r
+#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C))\r
+#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220))\r
+#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224))\r
+#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228))\r
+#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C))\r
+#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230))\r
+#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234))\r
+#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238))\r
+#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C))\r
+\r
+/* Pin Connect Block */\r
+#define PINSEL0 (*((volatile unsigned long *) 0xE002C000))\r
+#define PINSEL1 (*((volatile unsigned long *) 0xE002C004))\r
+#define PINSEL2 (*((volatile unsigned long *) 0xE002C014))\r
+\r
+/* General Purpose Input/Output (GPIO) */\r
+#define IOPIN (*((volatile unsigned long *) 0xE0028000))\r
+#define IOSET (*((volatile unsigned long *) 0xE0028004))\r
+#define IODIR (*((volatile unsigned long *) 0xE0028008))\r
+#define IOCLR (*((volatile unsigned long *) 0xE002800C))\r
+\r
+#define IOPIN0 (*((volatile unsigned long *) 0xE0028000))\r
+#define IOSET0 (*((volatile unsigned long *) 0xE0028004))\r
+#define IODIR0 (*((volatile unsigned long *) 0xE0028008))\r
+#define IOCLR0 (*((volatile unsigned long *) 0xE002800C))\r
+#define IOPIN1 (*((volatile unsigned long *) 0xE0028010))\r
+#define IOSET1 (*((volatile unsigned long *) 0xE0028014))\r
+#define IODIR1 (*((volatile unsigned long *) 0xE0028018))\r
+#define IOCLR1 (*((volatile unsigned long *) 0xE002801C))\r
+#define IOPIN2 (*((volatile unsigned long *) 0xE0028020))\r
+#define IOSET2 (*((volatile unsigned long *) 0xE0028024))\r
+#define IODIR2 (*((volatile unsigned long *) 0xE0028028))\r
+#define IOCLR2 (*((volatile unsigned long *) 0xE002802C))\r
+#define IOPIN3 (*((volatile unsigned long *) 0xE0028030))\r
+#define IOSET3 (*((volatile unsigned long *) 0xE0028034))\r
+#define IODIR3 (*((volatile unsigned long *) 0xE0028038))\r
+#define IOCLR3 (*((volatile unsigned long *) 0xE002803C))\r
+\r
+/* Fast I/O setup */\r
+#define FIO_BASE_ADDR 0x3FFFC000\r
+#define FIO0DIR (*((volatile unsigned long *) 0x3FFFC000)) \r
+#define FIO0MASK (*((volatile unsigned long *) 0x3FFFC010))\r
+#define FIO0PIN (*((volatile unsigned long *) 0x3FFFC014))\r
+#define FIO0SET (*((volatile unsigned long *) 0x3FFFC018))\r
+#define FIO0CLR (*((volatile unsigned long *) 0x3FFFC01C))\r
+#define FIO1DIR (*((volatile unsigned long *) 0x3FFFC020)) \r
+#define FIO1MASK (*((volatile unsigned long *) 0x3FFFC030))\r
+#define FIO1PIN (*((volatile unsigned long *) 0x3FFFC034))\r
+#define FIO1SET (*((volatile unsigned long *) 0x3FFFC038))\r
+#define FIO1CLR (*((volatile unsigned long *) 0x3FFFC03C))\r
+\r
+/* Memory Accelerator Module (MAM) */\r
+#define MAMCR (*((volatile unsigned long *) 0xE01FC000))\r
+#define MAMTIM (*((volatile unsigned long *) 0xE01FC004))\r
+#define MAMMAP (*((volatile unsigned long *) 0xE01FC040))\r
+\r
+/* Phase Locked Loop (PLL) */\r
+#define PLLCON (*((volatile unsigned long *) 0xE01FC080))\r
+#define PLLCFG (*((volatile unsigned long *) 0xE01FC084))\r
+#define PLLSTAT (*((volatile unsigned long *) 0xE01FC088))\r
+#define PLLFEED (*((volatile unsigned long *) 0xE01FC08C))\r
+\r
+/* PLL48 Registers */\r
+#define PLL48CON (*((volatile unsigned long *) 0xE01FC0A0))\r
+#define PLL48CFG (*((volatile unsigned long *) 0xE01FC0A4))\r
+#define PLL48STAT (*((volatile unsigned long *) 0xE01FC0A8))\r
+#define PLL48FEED (*((volatile unsigned long *) 0xE01FC0AC))\r
+\r
+/* Power Control */\r
+#define PCON (*((volatile unsigned long *) 0xE01FC0C0))\r
+#define PCONP (*((volatile unsigned long *) 0xE01FC0C4))\r
+\r
+/* VPB Divider */\r
+#define VPBDIV (*((volatile unsigned long *) 0xE01FC100))\r
+\r
+/* External Interrupts */\r
+#define EXTINT (*((volatile unsigned long *) 0xE01FC140))\r
+#define EXTWAKE (*((volatile unsigned long *) 0xE01FC144))\r
+#define EXTMODE (*((volatile unsigned long *) 0xE01FC148))\r
+#define EXTPOLAR (*((volatile unsigned long *) 0xE01FC14C))\r
+\r
+/* Reset */\r
+#define RSIR (*((volatile unsigned long *) 0xE01FC180))\r
+\r
+/* System Controls and Status */\r
+#define SCS (*((volatile unsigned long *) 0xE01FC1A0)) \r
+\r
+/* Timer 0 */\r
+#define TIMER0_IR (*((volatile unsigned long *) 0xE0004000))\r
+#define TIMER0_TCR (*((volatile unsigned long *) 0xE0004004))\r
+#define TIMER0_TC (*((volatile unsigned long *) 0xE0004008))\r
+#define TIMER0_PR (*((volatile unsigned long *) 0xE000400C))\r
+#define TIMER0_PC (*((volatile unsigned long *) 0xE0004010))\r
+#define TIMER0_MCR (*((volatile unsigned long *) 0xE0004014))\r
+#define TIMER0_MR0 (*((volatile unsigned long *) 0xE0004018))\r
+#define TIMER0_MR1 (*((volatile unsigned long *) 0xE000401C))\r
+#define TIMER0_MR2 (*((volatile unsigned long *) 0xE0004020))\r
+#define TIMER0_MR3 (*((volatile unsigned long *) 0xE0004024))\r
+#define TIMER0_CCR (*((volatile unsigned long *) 0xE0004028))\r
+#define TIMER0_CR0 (*((volatile unsigned long *) 0xE000402C))\r
+#define TIMER0_CR1 (*((volatile unsigned long *) 0xE0004030))\r
+#define TIMER0_CR2 (*((volatile unsigned long *) 0xE0004034))\r
+#define TIMER0_CR3 (*((volatile unsigned long *) 0xE0004038))\r
+#define TIMER0_EMR (*((volatile unsigned long *) 0xE000403C))\r
+#define TIMER0_CTCR (*((volatile unsigned long *) 0xE0004070))\r
+\r
+#define T0IR (*((volatile unsigned long *) 0xE0004000))\r
+#define T0TCR (*((volatile unsigned long *) 0xE0004004))\r
+#define T0TC (*((volatile unsigned long *) 0xE0004008))\r
+#define T0PR (*((volatile unsigned long *) 0xE000400C))\r
+#define T0PC (*((volatile unsigned long *) 0xE0004010))\r
+#define T0MCR (*((volatile unsigned long *) 0xE0004014))\r
+#define T0MR0 (*((volatile unsigned long *) 0xE0004018))\r
+#define T0MR1 (*((volatile unsigned long *) 0xE000401C))\r
+#define T0MR2 (*((volatile unsigned long *) 0xE0004020))\r
+#define T0MR3 (*((volatile unsigned long *) 0xE0004024))\r
+#define T0CCR (*((volatile unsigned long *) 0xE0004028))\r
+#define T0CR0 (*((volatile unsigned long *) 0xE000402C))\r
+#define T0CR1 (*((volatile unsigned long *) 0xE0004030))\r
+#define T0CR2 (*((volatile unsigned long *) 0xE0004034))\r
+#define T0CR3 (*((volatile unsigned long *) 0xE0004038))\r
+#define T0EMR (*((volatile unsigned long *) 0xE000403C))\r
+#define T0CTCR (*((volatile unsigned long *) 0xE0004070))\r
+\r
+/* Timer 1 */\r
+#define TIMER1_IR (*((volatile unsigned long *) 0xE0008000))\r
+#define TIMER1_TCR (*((volatile unsigned long *) 0xE0008004))\r
+#define TIMER1_TC (*((volatile unsigned long *) 0xE0008008))\r
+#define TIMER1_PR (*((volatile unsigned long *) 0xE000800C))\r
+#define TIMER1_PC (*((volatile unsigned long *) 0xE0008010))\r
+#define TIMER1_MCR (*((volatile unsigned long *) 0xE0008014))\r
+#define TIMER1_MR0 (*((volatile unsigned long *) 0xE0008018))\r
+#define TIMER1_MR1 (*((volatile unsigned long *) 0xE000801C))\r
+#define TIMER1_MR2 (*((volatile unsigned long *) 0xE0008020))\r
+#define TIMER1_MR3 (*((volatile unsigned long *) 0xE0008024))\r
+#define TIMER1_CCR (*((volatile unsigned long *) 0xE0008028))\r
+#define TIMER1_CR0 (*((volatile unsigned long *) 0xE000802C))\r
+#define TIMER1_CR1 (*((volatile unsigned long *) 0xE0008030))\r
+#define TIMER1_CR2 (*((volatile unsigned long *) 0xE0008034))\r
+#define TIMER1_CR3 (*((volatile unsigned long *) 0xE0008038))\r
+#define TIMER1_EMR (*((volatile unsigned long *) 0xE000803C))\r
+#define TIMER1_CTCR (*((volatile unsigned long *) 0xE0008070))\r
+\r
+#define T1IR (*((volatile unsigned long *) 0xE0008000))\r
+#define T1TCR (*((volatile unsigned long *) 0xE0008004))\r
+#define T1TC (*((volatile unsigned long *) 0xE0008008))\r
+#define T1PR (*((volatile unsigned long *) 0xE000800C))\r
+#define T1PC (*((volatile unsigned long *) 0xE0008010))\r
+#define T1MCR (*((volatile unsigned long *) 0xE0008014))\r
+#define T1MR0 (*((volatile unsigned long *) 0xE0008018))\r
+#define T1MR1 (*((volatile unsigned long *) 0xE000801C))\r
+#define T1MR2 (*((volatile unsigned long *) 0xE0008020))\r
+#define T1MR3 (*((volatile unsigned long *) 0xE0008024))\r
+#define T1CCR (*((volatile unsigned long *) 0xE0008028))\r
+#define T1CR0 (*((volatile unsigned long *) 0xE000802C))\r
+#define T1CR1 (*((volatile unsigned long *) 0xE0008030))\r
+#define T1CR2 (*((volatile unsigned long *) 0xE0008034))\r
+#define T1CR3 (*((volatile unsigned long *) 0xE0008038))\r
+#define T1EMR (*((volatile unsigned long *) 0xE000803C))\r
+#define T1CTCR (*((volatile unsigned long *) 0xE0008070))\r
+\r
+/* Pulse Width Modulator (PWM) */\r
+#define PWM_IR (*((volatile unsigned long *) 0xE0014000))\r
+#define PWM_TCR (*((volatile unsigned long *) 0xE0014004))\r
+#define PWM_TC (*((volatile unsigned long *) 0xE0014008))\r
+#define PWM_PR (*((volatile unsigned long *) 0xE001400C))\r
+#define PWM_PC (*((volatile unsigned long *) 0xE0014010))\r
+#define PWM_MCR (*((volatile unsigned long *) 0xE0014014))\r
+#define PWM_MR0 (*((volatile unsigned long *) 0xE0014018))\r
+#define PWM_MR1 (*((volatile unsigned long *) 0xE001401C))\r
+#define PWM_MR2 (*((volatile unsigned long *) 0xE0014020))\r
+#define PWM_MR3 (*((volatile unsigned long *) 0xE0014024))\r
+#define PWM_MR4 (*((volatile unsigned long *) 0xE0014040))\r
+#define PWM_MR5 (*((volatile unsigned long *) 0xE0014044))\r
+#define PWM_MR6 (*((volatile unsigned long *) 0xE0014048))\r
+#define PWM_CCR (*((volatile unsigned long *) 0xE0014028))\r
+#define PWM_CR0 (*((volatile unsigned long *) 0xE001402C))\r
+#define PWM_CR1 (*((volatile unsigned long *) 0xE0014030))\r
+#define PWM_CR2 (*((volatile unsigned long *) 0xE0014034))\r
+#define PWM_CR3 (*((volatile unsigned long *) 0xE0014038))\r
+#define PWM_EMR (*((volatile unsigned long *) 0xE001403C))\r
+#define PWM_PCR (*((volatile unsigned long *) 0xE001404C))\r
+#define PWM_LER (*((volatile unsigned long *) 0xE0014050))\r
+\r
+#define PWMIR (*((volatile unsigned long *) 0xE0014000))\r
+#define PWMTCR (*((volatile unsigned long *) 0xE0014004))\r
+#define PWMTC (*((volatile unsigned long *) 0xE0014008))\r
+#define PWMPR (*((volatile unsigned long *) 0xE001400C))\r
+#define PWMPC (*((volatile unsigned long *) 0xE0014010))\r
+#define PWMMCR (*((volatile unsigned long *) 0xE0014014))\r
+#define PWMMR0 (*((volatile unsigned long *) 0xE0014018))\r
+#define PWMMR1 (*((volatile unsigned long *) 0xE001401C))\r
+#define PWMMR2 (*((volatile unsigned long *) 0xE0014020))\r
+#define PWMMR3 (*((volatile unsigned long *) 0xE0014024))\r
+#define PWMMR4 (*((volatile unsigned long *) 0xE0014040))\r
+#define PWMMR5 (*((volatile unsigned long *) 0xE0014044))\r
+#define PWMMR6 (*((volatile unsigned long *) 0xE0014048))\r
+#define PWMCCR (*((volatile unsigned long *) 0xE0014028))\r
+#define PWMCR0 (*((volatile unsigned long *) 0xE001402C))\r
+#define PWMCR1 (*((volatile unsigned long *) 0xE0014030))\r
+#define PWMCR2 (*((volatile unsigned long *) 0xE0014034))\r
+#define PWMCR3 (*((volatile unsigned long *) 0xE0014038))\r
+#define PWMEMR (*((volatile unsigned long *) 0xE001403C))\r
+#define PWMPCR (*((volatile unsigned long *) 0xE001404C))\r
+#define PWMLER (*((volatile unsigned long *) 0xE0014050))\r
+\r
+/* Universal Asynchronous Receiver Transmitter 0 (UART0) */\r
+#define UART0_RBR (*((volatile unsigned long *) 0xE000C000))\r
+#define UART0_THR (*((volatile unsigned long *) 0xE000C000))\r
+#define UART0_IER (*((volatile unsigned long *) 0xE000C004))\r
+#define UART0_IIR (*((volatile unsigned long *) 0xE000C008))\r
+#define UART0_FCR (*((volatile unsigned long *) 0xE000C008))\r
+#define UART0_LCR (*((volatile unsigned long *) 0xE000C00C))\r
+#define UART0_MCR (*((volatile unsigned long *) 0xE000C010))\r
+#define UART0_LSR (*((volatile unsigned long *) 0xE000C014))\r
+#define UART0_MSR (*((volatile unsigned long *) 0xE000C018))\r
+#define UART0_SCR (*((volatile unsigned long *) 0xE000C01C))\r
+#define UART0_ACR (*((volatile unsigned long *) 0xE000C020))\r
+#define UART0_FDR (*((volatile unsigned long *) 0xE000C028))\r
+#define UART0_TER (*((volatile unsigned long *) 0xE000C030))\r
+#define UART0_DLL (*((volatile unsigned long *) 0xE000C000))\r
+#define UART0_DLM (*((volatile unsigned long *) 0xE000C004))\r
+\r
+#define U0RBR (*((volatile unsigned long *) 0xE000C000))\r
+#define U0THR (*((volatile unsigned long *) 0xE000C000))\r
+#define U0IER (*((volatile unsigned long *) 0xE000C004))\r
+#define U0IIR (*((volatile unsigned long *) 0xE000C008))\r
+#define U0FCR (*((volatile unsigned long *) 0xE000C008))\r
+#define U0LCR (*((volatile unsigned long *) 0xE000C00C))\r
+#define U0MCR (*((volatile unsigned long *) 0xE000C010))\r
+#define U0LSR (*((volatile unsigned long *) 0xE000C014))\r
+#define U0MSR (*((volatile unsigned long *) 0xE000C018))\r
+#define U0SCR (*((volatile unsigned long *) 0xE000C01C))\r
+#define U0ACR (*((volatile unsigned long *) 0xE000C020))\r
+#define U0FDR (*((volatile unsigned long *) 0xE000C028))\r
+#define U0TER (*((volatile unsigned long *) 0xE000C030))\r
+#define U0DLL (*((volatile unsigned long *) 0xE000C000))\r
+#define U0DLM (*((volatile unsigned long *) 0xE000C004))\r
+\r
+/* Universal Asynchronous Receiver Transmitter 1 (UART1) */\r
+#define UART1_RBR (*((volatile unsigned long *) 0xE0010000))\r
+#define UART1_THR (*((volatile unsigned long *) 0xE0010000))\r
+#define UART1_IER (*((volatile unsigned long *) 0xE0010004))\r
+#define UART1_IIR (*((volatile unsigned long *) 0xE0010008))\r
+#define UART1_FCR (*((volatile unsigned long *) 0xE0010008))\r
+#define UART1_LCR (*((volatile unsigned long *) 0xE001000C))\r
+#define UART1_MCR (*((volatile unsigned long *) 0xE0010010))\r
+#define UART1_LSR (*((volatile unsigned long *) 0xE0010014))\r
+#define UART1_MSR (*((volatile unsigned long *) 0xE0010018))\r
+#define UART1_SCR (*((volatile unsigned long *) 0xE001001C))\r
+#define UART1_ACR (*((volatile unsigned long *) 0xE0010020))\r
+#define UART1_FDR (*((volatile unsigned long *) 0xE0010028))\r
+#define UART1_TER (*((volatile unsigned long *) 0xE0010030))\r
+#define UART1_DLL (*((volatile unsigned long *) 0xE0010000))\r
+#define UART1_DLM (*((volatile unsigned long *) 0xE0010004))\r
+\r
+#define U1RBR (*((volatile unsigned long *) 0xE0010000))\r
+#define U1THR (*((volatile unsigned long *) 0xE0010000))\r
+#define U1IER (*((volatile unsigned long *) 0xE0010004))\r
+#define U1IIR (*((volatile unsigned long *) 0xE0010008))\r
+#define U1FCR (*((volatile unsigned long *) 0xE0010008))\r
+#define U1LCR (*((volatile unsigned long *) 0xE001000C))\r
+#define U1MCR (*((volatile unsigned long *) 0xE0010010))\r
+#define U1LSR (*((volatile unsigned long *) 0xE0010014))\r
+#define U1MSR (*((volatile unsigned long *) 0xE0010018))\r
+#define U1SCR (*((volatile unsigned long *) 0xE001001C))\r
+#define U1ACR (*((volatile unsigned long *) 0xE0010020))\r
+#define U1FDR (*((volatile unsigned long *) 0xE0010028))\r
+#define U1TER (*((volatile unsigned long *) 0xE0010030))\r
+#define U1DLL (*((volatile unsigned long *) 0xE0010000))\r
+#define U1DLM (*((volatile unsigned long *) 0xE0010004))\r
+\r
+/* I2C Interface 0 */\r
+#define I2C_I2CONSET (*((volatile unsigned long *) 0xE001C000))\r
+#define I2C_I2STAT (*((volatile unsigned long *) 0xE001C004))\r
+#define I2C_I2DAT (*((volatile unsigned long *) 0xE001C008))\r
+#define I2C_I2ADR (*((volatile unsigned long *) 0xE001C00C))\r
+#define I2C_I2SCLH (*((volatile unsigned long *) 0xE001C010))\r
+#define I2C_I2SCLL (*((volatile unsigned long *) 0xE001C014))\r
+#define I2C_I2CONCLR (*((volatile unsigned long *) 0xE001C018))\r
+\r
+#define I2CONSET (*((volatile unsigned long *) 0xE001C000))\r
+#define I2STAT (*((volatile unsigned long *) 0xE001C004))\r
+#define I2DAT (*((volatile unsigned long *) 0xE001C008))\r
+#define I2ADR (*((volatile unsigned long *) 0xE001C00C))\r
+#define I2SCLH (*((volatile unsigned long *) 0xE001C010))\r
+#define I2SCLL (*((volatile unsigned long *) 0xE001C014))\r
+#define I2CONCLR (*((volatile unsigned long *) 0xE001C018))\r
+\r
+/* I2C Interface 1 */\r
+#define I21CONSET (*((volatile unsigned long *) 0xE005C000))\r
+#define I21STAT (*((volatile unsigned long *) 0xE005C004))\r
+#define I21DAT (*((volatile unsigned long *) 0xE005C008))\r
+#define I21ADR (*((volatile unsigned long *) 0xE005C00C))\r
+#define I21SCLH (*((volatile unsigned long *) 0xE005C010))\r
+#define I21SCLL (*((volatile unsigned long *) 0xE005C014))\r
+#define I21CONCLR (*((volatile unsigned long *) 0xE005C018))\r
+\r
+/* SPI (Serial Peripheral Interface) */\r
+#define SPI_SPCR (*((volatile unsigned long *) 0xE0020000))\r
+#define SPI_SPSR (*((volatile unsigned long *) 0xE0020004))\r
+#define SPI_SPDR (*((volatile unsigned long *) 0xE0020008))\r
+#define SPI_SPCCR (*((volatile unsigned long *) 0xE002000C))\r
+#define SPI_SPTCR (*((volatile unsigned long *) 0xE0020010))\r
+#define SPI_SPTSR (*((volatile unsigned long *) 0xE0020014))\r
+#define SPI_SPTOR (*((volatile unsigned long *) 0xE0020018))\r
+#define SPI_SPINT (*((volatile unsigned long *) 0xE002001C))\r
+\r
+#define S0SPCR (*((volatile unsigned long *) 0xE0020000))\r
+#define S0SPSR (*((volatile unsigned long *) 0xE0020004))\r
+#define S0SPDR (*((volatile unsigned long *) 0xE0020008))\r
+#define S0SPCCR (*((volatile unsigned long *) 0xE002000C))\r
+#define S0SPTCR (*((volatile unsigned long *) 0xE0020010))\r
+#define S0SPTSR (*((volatile unsigned long *) 0xE0020014))\r
+#define S0SPTOR (*((volatile unsigned long *) 0xE0020018))\r
+#define S0SPINT (*((volatile unsigned long *) 0xE002001C))\r
+\r
+/* SPI1 (Serial Peripheral Interface 1) */\r
+#define S1SPCR (*((volatile unsigned long *) 0xE0030000))\r
+#define S1SPSR (*((volatile unsigned long *) 0xE0030004))\r
+#define S1SPDR (*((volatile unsigned long *) 0xE0030008))\r
+#define S1SPCCR (*((volatile unsigned long *) 0xE003000C))\r
+#define S1SPTCR (*((volatile unsigned long *) 0xE0030010))\r
+#define S1SPTSR (*((volatile unsigned long *) 0xE0030014))\r
+#define S1SPTOR (*((volatile unsigned long *) 0xE0030018))\r
+#define S1SPINT (*((volatile unsigned long *) 0xE003001C))\r
+\r
+/* SSP Controller */\r
+#define SSPCR0 (*((volatile unsigned long *) 0xE0068000))\r
+#define SSPCR1 (*((volatile unsigned long *) 0xE0068004))\r
+#define SSPDR (*((volatile unsigned long *) 0xE0068008))\r
+#define SSPSR (*((volatile unsigned long *) 0xE006800C))\r
+#define SSPCPSR (*((volatile unsigned long *) 0xE0068010))\r
+#define SSPIMSC (*((volatile unsigned long *) 0xE0068014))\r
+#define SSPRIS (*((volatile unsigned long *) 0xE0068018))\r
+#define SSPMIS (*((volatile unsigned long *) 0xE006801C))\r
+#define SSPICR (*((volatile unsigned long *) 0xE0068020))\r
+\r
+/* Real Time Clock */\r
+#define RTC_ILR (*((volatile unsigned long *) 0xE0024000))\r
+#define RTC_CTC (*((volatile unsigned long *) 0xE0024004))\r
+#define RTC_CCR (*((volatile unsigned long *) 0xE0024008))\r
+#define RTC_CIIR (*((volatile unsigned long *) 0xE002400C))\r
+#define RTC_AMR (*((volatile unsigned long *) 0xE0024010))\r
+#define RTC_CTIME0 (*((volatile unsigned long *) 0xE0024014))\r
+#define RTC_CTIME1 (*((volatile unsigned long *) 0xE0024018))\r
+#define RTC_CTIME2 (*((volatile unsigned long *) 0xE002401C))\r
+#define RTC_SEC (*((volatile unsigned long *) 0xE0024020))\r
+#define RTC_MIN (*((volatile unsigned long *) 0xE0024024))\r
+#define RTC_HOUR (*((volatile unsigned long *) 0xE0024028))\r
+#define RTC_DOM (*((volatile unsigned long *) 0xE002402C))\r
+#define RTC_DOW (*((volatile unsigned long *) 0xE0024030))\r
+#define RTC_DOY (*((volatile unsigned long *) 0xE0024034))\r
+#define RTC_MONTH (*((volatile unsigned long *) 0xE0024038))\r
+#define RTC_YEAR (*((volatile unsigned long *) 0xE002403C))\r
+#define RTC_ALSEC (*((volatile unsigned long *) 0xE0024060))\r
+#define RTC_ALMIN (*((volatile unsigned long *) 0xE0024064))\r
+#define RTC_ALHOUR (*((volatile unsigned long *) 0xE0024068))\r
+#define RTC_ALDOM (*((volatile unsigned long *) 0xE002406C))\r
+#define RTC_ALDOW (*((volatile unsigned long *) 0xE0024070))\r
+#define RTC_ALDOY (*((volatile unsigned long *) 0xE0024074))\r
+#define RTC_ALMON (*((volatile unsigned long *) 0xE0024078))\r
+#define RTC_ALYEAR (*((volatile unsigned long *) 0xE002407C))\r
+#define RTC_PREINT (*((volatile unsigned long *) 0xE0024080))\r
+#define RTC_PREFRAC (*((volatile unsigned long *) 0xE0024084))\r
+\r
+#define ILR (*((volatile unsigned long *) 0xE0024000))\r
+#define CTC (*((volatile unsigned long *) 0xE0024004))\r
+#define CCR (*((volatile unsigned long *) 0xE0024008))\r
+#define CIIR (*((volatile unsigned long *) 0xE002400C))\r
+#define AMR (*((volatile unsigned long *) 0xE0024010))\r
+#define CTIME0 (*((volatile unsigned long *) 0xE0024014))\r
+#define CTIME1 (*((volatile unsigned long *) 0xE0024018))\r
+#define CTIME2 (*((volatile unsigned long *) 0xE002401C))\r
+#define SEC (*((volatile unsigned long *) 0xE0024020))\r
+#define MIN (*((volatile unsigned long *) 0xE0024024))\r
+#define HOUR (*((volatile unsigned long *) 0xE0024028))\r
+#define DOM (*((volatile unsigned long *) 0xE002402C))\r
+#define DOW (*((volatile unsigned long *) 0xE0024030))\r
+#define DOY (*((volatile unsigned long *) 0xE0024034))\r
+#define MONTH (*((volatile unsigned long *) 0xE0024038))\r
+#define YEAR (*((volatile unsigned long *) 0xE002403C))\r
+#define ALSEC (*((volatile unsigned long *) 0xE0024060))\r
+#define ALMIN (*((volatile unsigned long *) 0xE0024064))\r
+#define ALHOUR (*((volatile unsigned long *) 0xE0024068))\r
+#define ALDOM (*((volatile unsigned long *) 0xE002406C))\r
+#define ALDOW (*((volatile unsigned long *) 0xE0024070))\r
+#define ALDOY (*((volatile unsigned long *) 0xE0024074))\r
+#define ALMON (*((volatile unsigned long *) 0xE0024078))\r
+#define ALYEAR (*((volatile unsigned long *) 0xE002407C))\r
+#define PREINT (*((volatile unsigned long *) 0xE0024080))\r
+#define PREFRAC (*((volatile unsigned long *) 0xE0024084))\r
+\r
+/* A/D Converter */\r
+#define ADCR (*((volatile unsigned long *) 0xE0034000))\r
+#define ADDR (*((volatile unsigned long *) 0xE0034004))\r
+#define AD1CR (*((volatile unsigned long *) 0xE0060000))\r
+#define AD1DR (*((volatile unsigned long *) 0xE0060004))\r
+\r
+/* D/A Converter */\r
+#define DACR (*((volatile unsigned long *) 0xE006C000))\r
+\r
+/* USB Controller */\r
+/* Device Interrupt Registers */\r
+#define DEV_INT_STAT (*((volatile unsigned long *) 0xE0090000))\r
+#define DEV_INT_EN (*((volatile unsigned long *) 0xE0090004))\r
+#define DEV_INT_CLR (*((volatile unsigned long *) 0xE0090008))\r
+#define DEV_INT_SET (*((volatile unsigned long *) 0xE009000C))\r
+#define DEV_INT_PRIO (*((volatile unsigned long *) 0xE009002C))\r
+\r
+/* Endpoint Interrupt Registers */\r
+#define EP_INT_STAT (*((volatile unsigned long *) 0xE0090030))\r
+#define EP_INT_EN (*((volatile unsigned long *) 0xE0090034))\r
+#define EP_INT_CLR (*((volatile unsigned long *) 0xE0090038))\r
+#define EP_INT_SET (*((volatile unsigned long *) 0xE009003C))\r
+#define EP_INT_PRIO (*((volatile unsigned long *) 0xE0090040))\r
+\r
+/* Endpoint Realization Registers */\r
+#define REALIZE_EP (*((volatile unsigned long *) 0xE0090044))\r
+#define EP_INDEX (*((volatile unsigned long *) 0xE0090048))\r
+#define MAXPACKET_SIZE (*((volatile unsigned long *) 0xE009004C))\r
+\r
+/* Command Reagisters */\r
+#define CMD_CODE (*((volatile unsigned long *) 0xE0090010))\r
+#define CMD_DATA (*((volatile unsigned long *) 0xE0090014))\r
+\r
+/* Data Transfer Registers */\r
+#define RX_DATA (*((volatile unsigned long *) 0xE0090018))\r
+#define TX_DATA (*((volatile unsigned long *) 0xE009001C))\r
+#define RX_PLENGTH (*((volatile unsigned long *) 0xE0090020))\r
+#define TX_PLENGTH (*((volatile unsigned long *) 0xE0090024))\r
+#define USB_CTRL (*((volatile unsigned long *) 0xE0090028))\r
+\r
+/* DMA Registers */\r
+#define DMA_REQ_STAT (*((volatile unsigned long *) 0xE0090050))\r
+#define DMA_REQ_CLR (*((volatile unsigned long *) 0xE0090054))\r
+#define DMA_REQ_SET (*((volatile unsigned long *) 0xE0090058))\r
+#define UDCA_HEAD (*((volatile unsigned long *) 0xE0090080))\r
+#define EP_DMA_STAT (*((volatile unsigned long *) 0xE0090084))\r
+#define EP_DMA_EN (*((volatile unsigned long *) 0xE0090088))\r
+#define EP_DMA_DIS (*((volatile unsigned long *) 0xE009008C))\r
+#define DMA_INT_STAT (*((volatile unsigned long *) 0xE0090090))\r
+#define DMA_INT_EN (*((volatile unsigned long *) 0xE0090094))\r
+#define EOT_INT_STAT (*((volatile unsigned long *) 0xE00900A0))\r
+#define EOT_INT_CLR (*((volatile unsigned long *) 0xE00900A4))\r
+#define EOT_INT_SET (*((volatile unsigned long *) 0xE00900A8))\r
+#define NDD_REQ_INT_STAT (*((volatile unsigned long *) 0xE00900AC))\r
+#define NDD_REQ_INT_CLR (*((volatile unsigned long *) 0xE00900B0))\r
+#define NDD_REQ_INT_SET (*((volatile unsigned long *) 0xE00900B4))\r
+#define SYS_ERR_INT_STAT (*((volatile unsigned long *) 0xE00900B8))\r
+#define SYS_ERR_INT_CLR (*((volatile unsigned long *) 0xE00900BC))\r
+#define SYS_ERR_INT_SET (*((volatile unsigned long *) 0xE00900C0)) \r
+#define MODULE_ID (*((volatile unsigned long *) 0xE00900FC))\r
+\r
+/* CAN Acceptance Filter RAM */\r
+#define AFRAM (*((volatile unsigned long *) 0xE0038000))\r
+\r
+/* CAN Acceptance Filter */\r
+#define AFMR (*((volatile unsigned long *) 0xE003C000))\r
+#define SFF_sa (*((volatile unsigned long *) 0xE003C004))\r
+#define SFF_GRP_sa (*((volatile unsigned long *) 0xE003C008))\r
+#define EFF_sa (*((volatile unsigned long *) 0xE003C00C))\r
+#define EFF_GRP_sa (*((volatile unsigned long *) 0xE003C010))\r
+#define ENDofTable (*((volatile unsigned long *) 0xE003C014))\r
+#define LUTerrAd (*((volatile unsigned long *) 0xE003C018))\r
+#define LUTerr (*((volatile unsigned long *) 0xE003C01C))\r
+\r
+/* CAN Central Registers */\r
+#define CANTxSR (*((volatile unsigned long *) 0xE0040000))\r
+#define CANRxSR (*((volatile unsigned long *) 0xE0040004))\r
+#define CANMSR (*((volatile unsigned long *) 0xE0040008))\r
+\r
+/* CAN Controller 1 (CAN1) */\r
+#define C1MOD (*((volatile unsigned long *) 0xE0044000))\r
+#define C1CMR (*((volatile unsigned long *) 0xE0044004))\r
+#define C1GSR (*((volatile unsigned long *) 0xE0044008))\r
+#define C1ICR (*((volatile unsigned long *) 0xE004400C))\r
+#define C1IER (*((volatile unsigned long *) 0xE0044010))\r
+#define C1BTR (*((volatile unsigned long *) 0xE0044014))\r
+#define C1EWL (*((volatile unsigned long *) 0xE0044018))\r
+#define C1SR (*((volatile unsigned long *) 0xE004401C))\r
+#define C1RFS (*((volatile unsigned long *) 0xE0044020))\r
+#define C1RID (*((volatile unsigned long *) 0xE0044024))\r
+#define C1RDA (*((volatile unsigned long *) 0xE0044028))\r
+#define C1RDB (*((volatile unsigned long *) 0xE004402C))\r
+#define C1TFI1 (*((volatile unsigned long *) 0xE0044030))\r
+#define C1TID1 (*((volatile unsigned long *) 0xE0044034))\r
+#define C1TDA1 (*((volatile unsigned long *) 0xE0044038))\r
+#define C1TDB1 (*((volatile unsigned long *) 0xE004403C))\r
+#define C1TFI2 (*((volatile unsigned long *) 0xE0044040))\r
+#define C1TID2 (*((volatile unsigned long *) 0xE0044044))\r
+#define C1TDA2 (*((volatile unsigned long *) 0xE0044048))\r
+#define C1TDB2 (*((volatile unsigned long *) 0xE004404C))\r
+#define C1TFI3 (*((volatile unsigned long *) 0xE0044050))\r
+#define C1TID3 (*((volatile unsigned long *) 0xE0044054))\r
+#define C1TDA3 (*((volatile unsigned long *) 0xE0044058))\r
+#define C1TDB3 (*((volatile unsigned long *) 0xE004405C))\r
+\r
+/* CAN Controller 2 (CAN2) */\r
+#define C2MOD (*((volatile unsigned long *) 0xE0048000))\r
+#define C2CMR (*((volatile unsigned long *) 0xE0048004))\r
+#define C2GSR (*((volatile unsigned long *) 0xE0048008))\r
+#define C2ICR (*((volatile unsigned long *) 0xE004800C))\r
+#define C2IER (*((volatile unsigned long *) 0xE0048010))\r
+#define C2BTR (*((volatile unsigned long *) 0xE0048014))\r
+#define C2EWL (*((volatile unsigned long *) 0xE0048018))\r
+#define C2SR (*((volatile unsigned long *) 0xE004801C))\r
+#define C2RFS (*((volatile unsigned long *) 0xE0048020))\r
+#define C2RID (*((volatile unsigned long *) 0xE0048024))\r
+#define C2RDA (*((volatile unsigned long *) 0xE0048028))\r
+#define C2RDB (*((volatile unsigned long *) 0xE004802C))\r
+#define C2TFI1 (*((volatile unsigned long *) 0xE0048030))\r
+#define C2TID1 (*((volatile unsigned long *) 0xE0048034))\r
+#define C2TDA1 (*((volatile unsigned long *) 0xE0048038))\r
+#define C2TDB1 (*((volatile unsigned long *) 0xE004803C))\r
+#define C2TFI2 (*((volatile unsigned long *) 0xE0048040))\r
+#define C2TID2 (*((volatile unsigned long *) 0xE0048044))\r
+#define C2TDA2 (*((volatile unsigned long *) 0xE0048048))\r
+#define C2TDB2 (*((volatile unsigned long *) 0xE004804C))\r
+#define C2TFI3 (*((volatile unsigned long *) 0xE0048050))\r
+#define C2TID3 (*((volatile unsigned long *) 0xE0048054))\r
+#define C2TDA3 (*((volatile unsigned long *) 0xE0048058))\r
+#define C2TDB3 (*((volatile unsigned long *) 0xE004805C))\r
+\r
+/* CAN Controller 3 (CAN3) */\r
+#define C3MOD (*((volatile unsigned long *) 0xE004C000))\r
+#define C3CMR (*((volatile unsigned long *) 0xE004C004))\r
+#define C3GSR (*((volatile unsigned long *) 0xE004C008))\r
+#define C3ICR (*((volatile unsigned long *) 0xE004C00C))\r
+#define C3IER (*((volatile unsigned long *) 0xE004C010))\r
+#define C3BTR (*((volatile unsigned long *) 0xE004C014))\r
+#define C3EWL (*((volatile unsigned long *) 0xE004C018))\r
+#define C3SR (*((volatile unsigned long *) 0xE004C01C))\r
+#define C3RFS (*((volatile unsigned long *) 0xE004C020))\r
+#define C3RID (*((volatile unsigned long *) 0xE004C024))\r
+#define C3RDA (*((volatile unsigned long *) 0xE004C028))\r
+#define C3RDB (*((volatile unsigned long *) 0xE004C02C))\r
+#define C3TFI1 (*((volatile unsigned long *) 0xE004C030))\r
+#define C3TID1 (*((volatile unsigned long *) 0xE004C034))\r
+#define C3TDA1 (*((volatile unsigned long *) 0xE004C038))\r
+#define C3TDB1 (*((volatile unsigned long *) 0xE004C03C))\r
+#define C3TFI2 (*((volatile unsigned long *) 0xE004C040))\r
+#define C3TID2 (*((volatile unsigned long *) 0xE004C044))\r
+#define C3TDA2 (*((volatile unsigned long *) 0xE004C048))\r
+#define C3TDB2 (*((volatile unsigned long *) 0xE004C04C))\r
+#define C3TFI3 (*((volatile unsigned long *) 0xE004C050))\r
+#define C3TID3 (*((volatile unsigned long *) 0xE004C054))\r
+#define C3TDA3 (*((volatile unsigned long *) 0xE004C058))\r
+#define C3TDB3 (*((volatile unsigned long *) 0xE004C05C))\r
+\r
+/* CAN Controller 4 (CAN4) */\r
+#define C4MOD (*((volatile unsigned long *) 0xE0050000))\r
+#define C4CMR (*((volatile unsigned long *) 0xE0050004))\r
+#define C4GSR (*((volatile unsigned long *) 0xE0050008))\r
+#define C4ICR (*((volatile unsigned long *) 0xE005000C))\r
+#define C4IER (*((volatile unsigned long *) 0xE0050010))\r
+#define C4BTR (*((volatile unsigned long *) 0xE0050014))\r
+#define C4EWL (*((volatile unsigned long *) 0xE0050018))\r
+#define C4SR (*((volatile unsigned long *) 0xE005001C))\r
+#define C4RFS (*((volatile unsigned long *) 0xE0050020))\r
+#define C4RID (*((volatile unsigned long *) 0xE0050024))\r
+#define C4RDA (*((volatile unsigned long *) 0xE0050028))\r
+#define C4RDB (*((volatile unsigned long *) 0xE005002C))\r
+#define C4TFI1 (*((volatile unsigned long *) 0xE0050030))\r
+#define C4TID1 (*((volatile unsigned long *) 0xE0050034))\r
+#define C4TDA1 (*((volatile unsigned long *) 0xE0050038))\r
+#define C4TDB1 (*((volatile unsigned long *) 0xE005003C))\r
+#define C4TFI2 (*((volatile unsigned long *) 0xE0050040))\r
+#define C4TID2 (*((volatile unsigned long *) 0xE0050044))\r
+#define C4TDA2 (*((volatile unsigned long *) 0xE0050048))\r
+#define C4TDB2 (*((volatile unsigned long *) 0xE005004C))\r
+#define C4TFI3 (*((volatile unsigned long *) 0xE0050050))\r
+#define C4TID3 (*((volatile unsigned long *) 0xE0050054))\r
+#define C4TDA3 (*((volatile unsigned long *) 0xE0050058))\r
+#define C4TDB3 (*((volatile unsigned long *) 0xE005005C))\r
+\r
+/* Watchdog */\r
+#define WDMOD (*((volatile unsigned long *) 0xE0000000))\r
+#define WDTC (*((volatile unsigned long *) 0xE0000004))\r
+#define WDFEED (*((volatile unsigned long *) 0xE0000008))\r
+#define WDTV (*((volatile unsigned long *) 0xE000000C))\r
+\r
+#endif // __LPC2xxx_H\r
projects / my-code / arm.git / commitdiff