; season - junior
;
; author: hackbard@hackdaworld.dyndns.org
;


; at90s2313
; setup:
; vcc card --- atmel vcc
; vcc cam  --- 
; rst cam  --- atmel int0 (pd2)
; rst card --- atmel (pd4)
; clk card -\ 
;            -  atmel t1 (pd5)
; clk cam  -/
; gnd card --- gnd cam --- atmel gnd
; i/o card --- atmel icp (pd6)
; i/o cam  --- atmel int1 (pd3)

.include "../include/2313def.inc"

; functions by now:
;
; stupid mode only by now. just see what cam/card do and redirect
; this to card/cam.
;
; next implementation:
; 
; try to read one byte of card/cam communication and output via uart.
; output time information in some way.
;
; future:
;
; buffer/parse whole strings and decide whether to send to card or not.

; #######
; defines
; #######

; baudrate = clock freq / etu
; std smartcard etu: 372
; other smartcards: 625
.define clock 8000000
.define clk_h 4000000
.define etu 625
.define etu_h 312
.define baudrate 5 ; UBRR value for 76800 bits/s (8mhz clock)

; sizes
.define uart_data_len 4
.define uart_data_len_f 3

; names for registers
.define tmp r16
.define bitcount r17
.define tmp1 r18
.define tmp2 r19
.define byte r20
.define overflow_counter r21
.define counter_l r22
.define counter_h r23
.define state r24
.define state_m r25
.define mode r26
.define counter_l_tmp r27
.define counter_h_tmp r28
.define address_h r31
.define address_l r30
.define one r1
.define zero r0

; state
.define LOW (1<<0)
.define LOW_F 1
.define HIGH (1<<1)
.define HIGH_F 2
; mode
.define STUPID (1<<0) ; forward cam <-> card communication
.define STUPID_F 1
.define COOL (1<<1) ; send time (clocks) & state via uart
.define COOL_F 2
.define ELITE (1<<2) ; create bytes, maybe even whole command arrays
.define ELITE_F 3
.define GODLIKE (1<<3) ; filter and mask for commands to card - send rejected via uart only
.define GODLIKE_F 4
.define INCREDIBLE_HACK (1<<4) ; destroy all your hardware
.define INCREDIBLE_HACK_F 5 

; but there is only stupid and cool mode right now %)


; #############
; programm code
; #############

; ------------------
; interrupt vectors:
; ------------------

; reset
rjmp INIT

; int0
rjmp RST_CAM

; int1
rjmp REC_CAM

; timer/counter capt 1
rjmp REC_CARD

; timer/counter compare
reti

; timer/counter overflow 1
rjmp CLK_OVERFLOW

; timer/counter overflow 0
reti

; uart rx complete
reti

; uart data register empty
rjmp UART_OUT

; uart tx complete
reti

; analog comparator
reti

; ------------
; init routine
; ------------

INIT:

; set stackpointer
ldi tmp,low(RAMEND)
out SPL,tmp

; enable interrupts int0,int1
ldi tmp,((1<<INT0)|(1<<INT1))
out GIMSK,tmp
; int0/1 setup
ldi tmp,((1<<ISC01)|(0<<ISC00)|(1<<ISC11)|(0<<ISC10))
out MCUCR,tmp

; enable t/c overflow interrupt and icp
ldi tmp,((1<<TOIE1)|(1<<TICIE1))
out TIMSK,tmp
; setup t/c and icp
ldi tmp,((1<<CS12)|(1<<CS11)|(1<<CS10)|(1<<ICNC1)|(0<<ICES1))
out TCCR1B,tmp

; configure uart - interrupt enabled when i/o
ldi tmp,baudrate
out UBRR,tmp
sbi UCR,TXEN

; init registers
ldi bitcounter,0 
ldi byte,0
ldi overflow_counter,0
ldi tmp1,0
ldi tmp2,0 
ldi counter_l,0
ldi counter_h,0
ldi state,HIGH ; .. as waiting for falling edge of start bit
ldi state_m,0x03
ldi mode,(STUPID|COOL)
ldi counter_l_tmp,0
ldi counter_h_tmp,0
ldi address_h,SRAM_START_H
ldi tmp,1
mov one,tmp
ldi tmp,0
mov zero,tmp

; enable interrupts (global)
sei

; jump to mainloop
rjmp MAIN

; ------------
; main routine
; ------------

MAIN:

; loop and wait for interrupts
rjmp MAIN

; ----------------
; rec_card routine
; ----------------

REC_CARD:

; save counter
In counter_l,ICR1L
in counter_h,ICR1H

; toggle state
eor state,state_m

; toggle icp sense
rcall TOGGLE_ICP_SENSE

; fwd to cam if in stupid mode
sbrc mode,STUPID_F
rcall FWD_TO_CAM

; calculate delta clocks if in stupid mode
sbrc mode,COOL_F
rcall CALC_DELTA_CLOCK ; -> calc delta, store to counter_l_tmp, counter_h_tmp

; send time and state via uart
sbrc mode,COOL_F
rcall PREPARE_UART

; return
reti

; ------------------------
; toggle_icp_sense routine
; ------------------------

TOGGLE_ICP_SENSE:

; toggle according to state
in tmp,TCCR1B
cbi tmp,ICES1
sbrs state,HIGH ; maybe toggle according to TCCR1B?
sbi tmp,ICES1
out TCCR1B,tmp

; return 
ret

; ------------------
; fwd_to_cam routine
; ------------------

FWD_TO_CAM:

; disable external interrupt 1 while toggling edge
in tmp,GIMSK
cbr tmp,INT1
out GIMSK,tmp

; output state on port to cam
in tmp1,PORTD
sbr tmp1,PD3
sbrs state,HIGH_F
cbr tmp1,PD3

; configure as output and push-pull low/high
sbi DDRD,DDD3
out PORTD,tmp1;

; reenable external interrupt 1
cbr tmp,INT1
out GIMSK,tmp

; return
ret

; --------------------
; prepare_uart routine
; --------------------

PREPARE_UART:

; by now just send state and  counter, so there is no data to prepare

; enable uart data register empty interrupt
sbi UCR,UDRIE

; return
ret


; ---------------
; rec_cam routine
; ---------------

REC_CAM:

; first thing - pullup on
cbi DDRD,DDD3
sbi DDRD,PD3

; save counter
in counter_l,ICR1L
in counter_h,ICR1H

; toggle state
eor state,state_m

; toggle int sense
rcall TOGGLE_INT_SENSE

HIER FEHLT NOCH VIEL ...

; return
reti

; ------------------------
: toggle_int_sense routine
; ------------------------

TOGGLE_INT_SENSE:

in tmp,MCUCR
cbr tmp,ISC10
sbis state,HIGH_F
sbr tmp,ISC10
out MCUCR,tmp

; return
ret

; -------------------
; t1_overflow routine
; -------------------

T1_OVERFLOW:

; increment counter overflow
add overflow_counter,one

; return
reti

; ---------------
; rst_cam routine
; ---------------

RST_CAM:

; pull down rst from card
sbi DDRD,DDD4
cbi PORTD,PD4

; jump to init
rjmp INIT

; ----------------
; uart_out routine
; ----------------

UART_OUT:

; disable uart data register empty interrupt
cbi UCR,UDRIE

; init counter
mov address_l,zero

; send the data
rcall UART_SEND

; return
reti

.... wahhh ! zzZz