; main file of hdw-tank project ; ; author: hackbard@hackdaworld.org ; ; device specific definition file .include "../include/m128def.inc" ; defines .def tmp1 = r16 .def tmp2 = r17 .def uart_rxtx = r18 ; interrupts jmp RESET jmp EXT_INT0 jmp EXT_INT1 jmp EXT_INT2 jmp EXT_INT3 jmp EXT_INT4 jmp EXT_INT5 jmp EXT_INT6 jmp EXT_INT7 jmp TIM2_COMP jmp TIM2_OVF jmp TIM1_CAPT jmp TIM1_COMPA jmp TIM1_COMPB jmp TIM1_OVF jmp TIM0_COMP jmp TIM0_OVF jmp SPI_STC jmp USART0_RXC jmp USART0_DRE jmp USART0_TXC jmp ADC jmp EE_RDY jmp ANA_COMP jmp TIM1_COMPC jmp TIM3_CAPT jmp TIM3_COMPA jmp TIM3_COMPB jmp TIM3_COMPC jmp TIM3_OVF jmp USART1_RXC jmp USART1_DRE jmp USART1_TXC jmp TWI jmp SPM_RDY ; include control defines .include "ctrl.def" RESET: INIT: ; motor init rcall MOTOR_INIT ; uart init rcall UART_INIT ; uart interrupt enable rcall UART_INT_RX_INIT ; set stackpointer ldi tmp1,high(RAMEND) out SPH,tmp1 ldi tmp1,low(RAMEND) out SPL,tmp1 ; global interrupt enable ;sei ; signal ready output ldi uart_rxtx,0x23 rcall UART_TX MAIN: ; loop forever rjmp MAIN ; include subroutines .include "motor.asm" .include "uart.asm" ; ; interrupt routines ; EXT_INT0: reti EXT_INT1: reti EXT_INT2: reti EXT_INT3: reti EXT_INT4: reti EXT_INT5: reti EXT_INT6: reti EXT_INT7: reti TIM2_COMP: reti TIM2_OVF: reti TIM1_CAPT: reti TIM1_COMPA: reti TIM1_COMPB: reti TIM1_OVF: reti TIM0_COMP: reti TIM0_OVF: reti SPI_STC: reti USART0_RXC: ; read received byte and drive the motor ; in addition, loop it back to the host ; receive routine (byte stored in uart_rxtx) rcall UART_RX ; loop back the received byte rcall UART_TX ; ; drive the motor ; ; stop it first rcall MOTOR_STOP ; fwd cpi uart_rxtx,CTRL_FWD brne CTRL1 rcall MOTOR_FWD rjmp CTRL4 ; bwd CTRL1: cpi uart_rxtx,CTRL_BWD brne CTRL2 rcall MOTOR_BWD rjmp CTRL4 ; right CTRL2: cpi uart_rxtx,CTRL_RIGHT brne CTRL3 rcall MOTOR_RIGHT rjmp CTRL4 ; left CTRL3: cpi uart_rxtx,CTRL_LEFT brne CTRL4 rcall MOTOR_LEFT CTRL4: ; return reti USART0_DRE: reti USART0_TXC: reti ADC: reti EE_RDY: reti ANA_COMP: reti TIM1_COMPC: reti TIM3_CAPT: reti TIM3_COMPA: reti TIM3_COMPB: reti TIM3_COMPC: reti TIM3_OVF: reti USART1_RXC: reti USART1_DRE: reti USART1_TXC: reti TWI: reti SPM_RDY: reti