init of monolyzer project

diff --git a/monolyzer/main.asm b/monolyzer/main.asm
new file mode 100644 (file)
index 0000000..97b4d95
--- /dev/null
+++ b/monolyzer/main.asm
@@ -0,0 +1,165 @@
+; main file of the monolyzer project
+;
+; author: hackbard@hackdaworld.org
+;
+
+; device specific definition file
+.include "../include/tn2313def.inc"
+
+; defines
+.def   zero            = r1
+.def   one             = r2
+.def   tmp1            = r16
+.def   tmp2            = r17
+.def   uart_rxtx       = r18
+.def   count           = r19
+
+;
+; interrupts
+;
+
+; RESET
+rjmp INIT
+
+; INT0
+reti
+
+; INT1
+reti
+
+; T1 CAPT1
+reti
+
+; T1 COMP A
+reti
+
+; T1 OVF1
+reti
+
+; T0 OVF0
+rjmp T0_OVF
+
+; UART RX
+rjmp UART_RECEIVE
+
+; UART UDRE
+reti
+
+; UART TX
+reti
+
+; ANA COMP
+reti
+
+; PCINT
+reti
+
+; T1 COMP B
+reti
+
+; T0 COMP A
+reti
+
+; T0 COMP B
+reti
+
+; USI START
+reti
+
+; USI OVF
+reti
+
+; EE READY
+reti
+
+; WDT OVF
+reti
+
+;
+; init and main code
+;
+
+RESET:
+INIT:
+
+       ; gio port init
+       rcall PORT_INIT
+
+       ; timer0 init
+       rcall TIMER0_INIT
+
+       ; timer0 interrupt enable
+       rcall TIMER0_INT_INIT
+
+       ; uart init
+       rcall UART_INIT
+
+       ; uart interrupt enable
+       rcall UART_INT_RX_INIT
+
+       ; zero and one initialization
+       ldi tmp1,0
+       mov zero,tmp1
+       ldi tmp1,1
+       mov one,tmp1
+
+       ; set stackpointer
+       ldi tmp1,low(RAMEND)
+       out SPL,tmp1
+
+       ; more init
+       ldi count,0x21
+
+       ; signal ready output
+       ldi uart_rxtx,0x68
+       rcall UART_TX
+
+       ; global interrupt enable
+       sei 
+
+MAIN:
+
+WAIT_FOR_HIGH:
+       ; start as soon as we get a high signal
+
+       rjmp WAIT_FOR_HIGH
+
+
+; include subroutines
+.include "port.asm"
+.include "timer.asm"
+.include "uart.asm"
+
+
+;
+; interrupt routines
+;
+
+T0_OVF:
+
+       ; debug output
+       cbi PORTD,3
+
+       ; read port
+
+       ; store another byte into sram
+
+
+       ; debug output
+       sbi PORTD,3
+       
+       reti
+
+UART_RECEIVE:
+       reti
+
+
+;
+; sram
+;
+
+.dseg
+
+DATA_STORAGE: .byte 8
+
+

diff --git a/monolyzer/port.asm b/monolyzer/port.asm
new file mode 100644 (file)
index 0000000..2e81611
--- /dev/null
+++ b/monolyzer/port.asm
@@ -0,0 +1,26 @@
+; port functions
+
+PORT_INIT:
+
+       ; port b 0-7 -> input (useless, default)
+       ldi tmp1,0x00
+       out DDRB,tmp1
+
+       ; switch pull-up off for inputs (useless, default)
+       ldi tmp1,0x00
+       out PORTB,tmp1
+
+       ; port d pin 6 -> output
+       sbi DDRD,6
+
+       ; port d pin 6 -> high
+       cbi PORTD,6
+
+       ; port d 2 -> output (debug 1)
+       sbi DDRD,2
+
+       ; port d 3 -> output (debug 2)
+       sbi DDRD,3
+
+       ret
+

diff --git a/monolyzer/timer.asm b/monolyzer/timer.asm
new file mode 100644 (file)
index 0000000..c9ef074
--- /dev/null
+++ b/monolyzer/timer.asm
@@ -0,0 +1,18 @@
+; timer functions
+
+TIMER0_INIT:
+
+       ; clock select, no prescaling
+       ldi tmp1,0x01
+       out TCCR0B,tmp1
+
+       ret
+
+TIMER0_INT_INIT:
+
+       ; overflow interrupt
+       ldi tmp1,0x02
+       out TIMSK,tmp1
+
+       ret
+

diff --git a/monolyzer/uart.asm b/monolyzer/uart.asm
new file mode 100644 (file)
index 0000000..fbfbf3d
--- /dev/null
+++ b/monolyzer/uart.asm
@@ -0,0 +1,60 @@
+; uart functions
+
+; default uart settings / 19.2k @ 8 mhz
+; ifndef UART_BR_H
+.equ   UART_BR_H       = 0
+; ifndef UART_BR_L
+.equ   UART_BR_L       = 25
+
+UART_INIT:
+
+       ; baudrate
+       ldi tmp1,UART_BR_H
+       out UBRRH,tmp1
+       ldi tmp1,UART_BR_L
+       out UBRRL,tmp1
+
+       ; enable
+       ldi tmp1,(1<<RXEN)|(1<<TXEN)
+       out UCSRB,tmp1
+
+       ; frame format -> 8n1
+       ldi tmp1,(1<<UCSZ0)|(1<<UCSZ1)
+       out UCSRC,tmp1
+
+       ret
+
+UART_INT_RX_INIT:
+
+       in tmp1,UCSRB
+       sbr tmp1,(1<<RXCIE)
+       out UCSRB,tmp1
+
+       ret
+
+UART_INT_TX_INIT:
+
+       in tmp1,UCSRB
+       sbr tmp1,(1<<TXCIE)
+       out UCSRB,tmp1
+
+       ret
+
+UART_RX:
+
+       ; get/store received byte
+       sbis UCSRA,RXC
+               rjmp UART_RX
+       in uart_rxtx,UDR
+
+       ret
+
+UART_TX:
+
+       ; transmit content of uart_rxtx
+       sbis UCSRA,UDRE
+               rjmp UART_TX
+       out UDR,uart_rxtx
+
+       ret
+