library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity s2usb is
    Port ( switch : in  STD_LOGIC_VECTOR (7 downto 0);
           -- button : in  STD_LOGIC;
			  clock : in STD_LOGIC;
			  usb_full : in  STD_LOGIC;
           usb_data : out  STD_LOGIC_VECTOR (7 downto 0);
           usb_fifo_addr : out  STD_LOGIC_VECTOR (1 downto 0);
           usb_write : out  STD_LOGIC;
           usb_pktend : out  STD_LOGIC;
			  usb_cs : out STD_LOGIC;
			  led : out std_logic_vector(7 downto 0));
end s2usb;

architecture Behavioral of s2usb is

signal prescaler : std_logic_vector(2 downto 0) := "000";
signal state : std_logic := '1';

begin

usb_send : process(clock)
begin

	if(clock'event) and (clock='1') then
		prescaler <= prescaler + 1;
		if(prescaler="000") then
			if(usb_full='1') then
				if(state='1') then
					state <= '0';
				elsif(state='0') then
					state <= '1';
				end if;
				usb_write <= state;
			end if;
		end if;
	end if;
	
end process;

usb_fifo_addr <= "10"; -- ep6
usb_data <= switch;
usb_cs <= '0';
usb_pktend <= '1';
led <= switch;

end Behavioral;