1 ;****************************************************************************************
\r
2 ;* This can be included in the assembly file
\r
3 ;* in order to use the names in the spec sheet.
\r
5 ;* I/O Register Definitions per AT86RF401 spec
\r
6 ;****************************************************************************************
\r
8 ;***** device directive, will make the assembler check for illegal instructions.
\r
11 ;***** I/O Register Definitions
\r
12 .equ SREG =$3F ; Status
\r
13 .equ SPH =$3E ; Stack Pointer High
\r
14 .equ SPL =$3D ; Stack Pointer Low
\r
15 .equ BL_CONFIG =$35 ; Battery Low Configuration
\r
16 .equ B_DET =$34 ; Button Detect
\r
17 .equ PWR_CTL =$33 ; Power Control
\r
18 .equ IO_DATIN =$32 ; I/O Data In
\r
19 .equ IO_DATOUT =$31 ; I/O Data Out
\r
20 .equ IO_ENAB =$30 ; I/O Enable
\r
21 .equ WDTCR =$22 ; Watchdog Timer Control
\r
22 .equ BTCR =$21 ; Bit Timer Control
\r
23 .equ BTCNT =$20 ; Bit Timer Count
\r
24 .equ DEEAR =$1E ; Data EEPROM Address
\r
25 .equ DEEDR =$1D ; Data EEPROM Data
\r
26 .equ DEECR =$1C ; Data EEPROM Control
\r
27 .equ LOCKDET2 =$17 ; Lock Detector Configuration Register 2
\r
28 .equ VCOTUNE =$16 ; VCO Tuning Register
\r
29 .equ PWR_ATTEN =$14 ; Power Attenuation Control Register
\r
30 .equ TX_CNTL =$12 ; Transmitter Control Register
\r
31 .equ LOCKDET1 =$10 ; Lock Detector Configuration Register 1
\r
32 .equ SRAM_START =$0060 ; Start of RAM
\r
33 .equ SRAM_END =$00DF ; End of RAM
\r
35 ;**** Bit Definitions
\r
191 ;****************************************************************************************
\r
192 ;* Define global registers
\r
193 ;****************************************************************************************
\r