1 ;***************************************************************************
\r
2 ;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y
\r
5 ;* File Name :"m8515def.inc"
\r
6 ;* Title :Register/Bit Definitions for the ATmega8515
\r
7 ;* Date :April 16th, 2002
\r
9 ;* Support telephone :+47 72 88 87 20 (ATMEL Norway)
\r
10 ;* Support fax :+47 72 88 87 18 (ATMEL Norway)
\r
11 ;* Support E-mail :support@atmel.no
\r
12 ;* Target MCU :ATmega8515
\r
15 ;* When including this file in the assembly program file, all I/O register
\r
16 ;* names and I/O register bit names appearing in the data book can be used.
\r
17 ;* In addition, the six registers forming the three data pointers X, Y and
\r
18 ;* Z have been assigned names XL - ZH. Highest RAM address for Internal
\r
19 ;* SRAM is also defined
\r
21 ;* The Register names are represented by their hexadecimal address.
\r
23 ;* The Register Bit names are represented by their bit number (0-7).
\r
25 ;* Please observe the difference in using the bit names with instructions
\r
26 ;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
\r
27 ;* (skip if bit in register set/cleared). The following example illustrates
\r
30 ;* in r16,PORTB ;read PORTB latch
\r
31 ;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
\r
32 ;* out PORTB,r16 ;output to PORTB
\r
34 ;* in r16,TIFR ;read the Timer Interrupt Flag Register
\r
35 ;* sbrc r16,TOV0 ;test the overflow flag (use bit#)
\r
36 ;* rjmp TOV0_is_set ;jump if set
\r
37 ;* ... ;otherwise do something else
\r
38 ;***************************************************************************
\r
40 ;***** Specify Device
\r
43 ;***** I/O Register Definitions
\r
55 .equ MCUSR =$34 ; For compatibility,
\r
56 .equ MCUCSR =$34 ; keep both names until further
\r
72 .equ UCSRC =$20 ; Note! UCSRC equals UBRRH
\r
73 .equ UBRRH =$20 ; Note! UCSRC equals UBRRH
\r
96 .equ UBRR =$09 ; for AT90S8515
\r
102 .equ OSCCAL =$04 ; New
\r
104 ;***** Bit Definitions
\r
109 .equ IVSEL =1 ; interrupt vector select
\r
110 .equ IVCE =0 ; interrupt vector change enable
\r
191 .equ PWM11 = 1 ; OBSOLETE! Use WGM11
\r
192 .equ PWM10 = 0 ; OBSOLETE! Use WGM10
\r
199 .equ CTC11 = 4 ; OBSOLETE! Use WGM13
\r
200 .equ CTC10 = 3 ; OBSOLETE! Use WGM12
\r
372 .equ OR =3 ; old name kept for compatibilty
\r
385 .equ CHR9 =2 ; old name kept for compatibilty
\r
434 .equ EEPROMEND = $1FF
\r
435 .equ FLASHEND = $FFF
\r
439 .equ SMALLBOOTSTART =0b00111110000000 ;($0F80) smallest boot block is 128W
\r
440 .equ SECONDBOOTSTART =0b00111100000000 ;($0F00) 2'nd boot block size is 256W
\r
441 .equ THIRDBOOTSTART =0b00111000000000 ;($0E00) third boot block size is 512W
\r
442 .equ LARGEBOOTSTART =0b00110000000000 ;($0C00) largest boot block is 1KW
\r
443 .equ BOOTSTART =THIRDBOOTSTART ;OBSOLETE!!! kept for compatibility
\r
444 .equ PAGESIZE =32 ;number of WORDS in a page
\r
447 .equ INT0addr=$001 ;External Interrupt0 Vector Address
\r
448 .equ INT1addr=$002 ;External Interrupt1 Vector Address
\r
449 .equ ICP1addr=$003 ;Input Capture1 Interrupt Vector Address
\r
450 .equ OC1Aaddr=$004 ;Output Compare1A Interrupt Vector Address
\r
451 .equ OC1Baddr=$005 ;Output Compare1B Interrupt Vector Address
\r
452 .equ OVF1addr=$006 ;Overflow1 Interrupt Vector Address
\r
453 .equ OVF0addr=$007 ;Overflow0 Interrupt Vector Address
\r
454 .equ SPIaddr =$008 ;SPI Interrupt Vector Address
\r
455 .equ URXCaddr=$009 ;UART Receive Complete Interrupt Vector Address
\r
456 .equ UDREaddr=$00a ;UART Data Register Empty Interrupt Vector Address
\r
457 .equ UTXCaddr=$00b ;UART Transmit Complete Interrupt Vector Address
\r
458 .equ ACIaddr =$00c ;Analog Comparator Interrupt Vector Address
\r
460 .equ INT2addr=$00d ;External Interrupt2 Vector Address
\r
461 .equ OC0addr= $00e ;Output Compare0 Interrupt Vector Address
\r
462 .equ ERDYaddr=$00f ; EEPROM Interrupt Vector Address
\r
463 .equ SPMaddr =$010 ; SPM complete Interrupt Vector Address
\r
464 .equ SPMRaddr =$010 ; SPM complete Interrupt Vector Address
\r