reti
; T1 CAPT1
-rjmp T1_CAPTURE
+reti
; T1 COMP A
reti
; T1 OVF1
-reti
+rjmp T1_OVERFLOW
; T0 OVF0
reti
reti
; ANA COMP
-reti
+rjmp ANA_COMP
; PCINT
reti
; uart init
UART_INIT:
- ldi r16,51 ; 9600 bps @ 8mhz
+ ldi r16,51 ; 9k6 bps @ 8mhz
out UBRRL, r16
out UBRRH, r0
- ldi r16,(1<<UCSZ0)|(1<<UCSZ1) ; 8 data bits, no parity, 1 stop bit
+ ldi r16,(1<<UCSZ0)|(1<<UCSZ1) ; 8n1
out UCSRC,r16;
sbi UCSRB,TXEN ; enable tx
; timer init
- TIME_INIT:
+ TIMER_INIT:
- ldi r16,(1<<CS10)|(1<<CS11) ; prescaler 1/64
+ ; prescaler 64
+ ldi r16,(1<<CS10)|(1<<CS11)
out TCCR1B,r16
- ldi r16,(1<<ICIE1) ; enable input capture interrupt
- out TIMSK,r16
-
; analog comparator init
ANA_COMP_INIT:
- ; interrupt if voltage is higher, enable input capture function ot tc1
- ldi r16,(1<<ACIS0)|(1<<ACIS0)|(1<<ACIC) ; (no analog comp interrupt!)
+ ; interrupt if voltage is higher
+ ; enable input capture function ot tc1
+ ldi r16,(1<<ACIS0)|(1<<ACIS1)
out ACSR,r16
; output for rc element
- ldi r17,(1<<DDB2)
- out DDRB,r17
- out PORTB,r0
+ RC_PIN_INIT:
+ sbi DDRD,DDD2 ; pin 2 port d is output
- sei ; global interrupt enable
MAIN:
- rjmp MAIN
+
+ ; status register
+ ldi r31,0
+
+ ; decharge rc pin
+ cbi PORTD,PORTD2
+
+ ; enable overflow interrupt
+ ldi r17,(1<<TOIE1)
+ out TIMSK,r17
+
+ ; global interrupt enable
+ sei
+
+ ; loop forever
+ MAIN_LOOP:
+
+ ; loop
+ rjmp MAIN_LOOP
;
-; timer 1 input capture interrupt routine
+; analog comparator interrupt routine
;
-T1_CAPTURE:
+ANA_COMP:
- ; disable input capture interrupt
- in r17,TIMSK
- cbr r17,ICIE1
- out TIMSK,r17
+ ; immediately take away the clock
+ out TCCR1B,r0
+
+ ; disable comparator + del possible interrupt flag
+ cbi ACSR,ACIE
; pull low the rc element
- cbi PORTB,PORTB2
+ cbi PORTD,PORTD2
; read the captured value
- in r19,ICR1L
- in r18,ICR1H
+ in r19,TCNT1L
+ in r18,TCNT1H
- ; uart out
LOOP_ONE:
sbis UCSRA,UDRE
rjmp LOOP_ONE
rjmp LOOP_TWO
out UDR,r19
- ; enable timer 1 overflow interrupt
- in r17,TIMSK
- sbr r17,TOIE1
- out TIMSK,r17
+ ; reset timer counter
+ out TCNT1H,r0
+ out TCNT1L,r0
+
+ ; clear possible overflow flag
+ ldi r17,(1<<TOV1)
+ out TIFR,r17
+
+ ; enable the counter
+ ldi r17,(1<<CS10)|(1<<CS11)
+ out TCCR1B,r17
reti
T1_OVERFLOW:
- ; disable timer 1 overflow interrupt
- in r17,TOIE1
- cbr r17,TOIE1
- out TIMSK,r17
+ ; check whether second run
+ cpi r31,4
+ brne MARK_2ND_RUN
- ; uart space out
- ldi r17,0x20
- LOOP_THREE:
- sbis UCSRA,UDRE
- rjmp LOOP_TWO
- out UDR,r17
+ ; reset to a first run
+ ldi r31,0
- ; reset timer counter
- out TCNT1H,r0
- out TCNT1L,r0
+ ; enable analog comparator interrupt + del possible interrupt flags
+ sbi ACSR,ACIE
+ sbi ACSR,ACI
; pull rc element high
- sbi PORTB,PORTB2
-
- ; enable input capture interrupt
- in r17,TIMSK
- sbr r17,ICIE1
- out TIMSK,r17
+ sbi PORTD,PORTD2
reti
+ MARK_2ND_RUN:
+ inc r31
+ reti
+