betty/fwflash.c

   1 /*
   2  * fwflash.c - handling the betty flashes
   3  *
   4  * author: hackbard@hackdaworld.org
   5  *
   6  */
   7
   8 /*
   9  * include files
  10  */
  11
  12 #include <stdio.h>
  13
  14 #include "lpc2xxx.h"
  15
  16 /*
  17  * defines
  18  */
  19
  20 /* bank 0/2 and boootloader addr/size */
  21 #define BANK0                   0x80000000
  22 #define BANK2                   0x82000000
  23 #define BANK_SIZE               0x00100000
  24 #define BOOTLOADER              0x7fffe000
  25 #define BL_SIZE                 0x00002000
  26
  27 /* flash cmd addresses - flash[0-18] <--> arm[1-19]*/
  28 #define B0F555  (*((volatile unsigned short *)(BANK0|0xaaa)))   // 0x555
  29 #define B0F2AA  (*((volatile unsigned short *)(BANK0|0x554)))   // 0x2aa
  30 #define B0F     (*((volatile unsigned short *)(BANK0)))
  31 #define B2F555  (*((volatile unsigned short *)(BANK2|0xaaa)))   // 0x555
  32 #define B2F2AA  (*((volatile unsigned short *)(BANK2|0x554)))   // 0x2aa
  33 #define B2F     (*((volatile unsigned short *)(BANK2)))
  34
  35 /* commands */
  36 #define CMD_READ                'R'
  37 #define CMD_WRITE               'W'
  38 #define CMD_CHIP_ERASE          'E'
  39 #define CMD_SECTOR_ERASE        'S'
  40 #define CMD_CHIP_ID             'I'
  41
  42 #define BUFSIZE                 16
  43
  44 /*
  45  * type definitions
  46  */
  47
  48 typedef unsigned char u8;
  49 typedef unsigned short u16;
  50 typedef unsigned int u32;
  51
  52 /*
  53  * sector addresses
  54  */
  55
  56 unsigned long sector_address[19]={
  57         0x00000,0x02000,0x03000,0x04000,0x08000,
  58         0x10000,0x18000,
  59         0x20000,0x28000,
  60         0x30000,0x38000,
  61         0x40000,0x48000,
  62         0x50000,0x58000,
  63         0x60000,0x68000,
  64         0x70000,0x78000
  65 };
  66
  67 /*
  68  * functions
  69  */
  70
  71 void uart0_send_byte(u8 send);
  72
  73 void mmap_init(u8 memtype) {
  74
  75         MEMMAP=memtype;
  76 }
  77
  78 void pll_init(void) {
  79
  80         /* configuration */
  81         PLLCFG=0x42;    // multiplier = 3 (for cclk), dividor = 4 (for f_cco)
  82         PLLCON=0x03;    // enable and set as clk source for the lpc
  83         /* feed sequence */
  84         PLLFEED=0xaa;
  85         PLLFEED=0x55;
  86         /* wait for lock */
  87         while(!(PLLSTAT&(1<<10)))
  88                 continue;
  89 }
  90
  91 void ext_mem_bank_init(void) {
  92
  93         BCFG0=0x10000420;       // flash 1
  94         BCFG1=0x00000c42;       // lcd
  95         BCFG2=0x10000420;       // flash 2
  96 }
  97
  98 void pin_select_init() {
  99
 100         /*
 101          * a[19:2] -> address lines
 102          */
 103
 104         PINSEL2=0x0d6041d4;
 105 }
 106
 107 void uart0_init(void) {
 108
 109         PINSEL0=0x05;                   // pin select -> tx, rx
 110         UART0_FCR=0x07;                 // enable fifo
 111         UART0_LCR=0x83;                 // set dlab + word length
 112         UART0_DLL=0x04;                 // br: 38400 @ 10/4 mhz
 113         UART0_DLM=0x00;
 114         UART0_LCR=0x03;                 // unset dlab
 115 }
 116
 117 void uart0_send_string(char *txbuf) {
 118
 119         int i;
 120
 121         i=0;
 122
 123         while(txbuf[i]) {
 124                 UART0_THR=txbuf[i++];
 125                 /* flush if tx buffer maximum reached */
 126                 if(!(i%16))
 127                         while(!(UART0_LSR&(1<<6)))
 128                                 continue;
 129         }
 130
 131         /* flush if \n and \r do not fit in the tx buffer */
 132         if(i>14)
 133                 while(!(UART0_LSR&(1<<6)))
 134                         continue;
 135
 136         UART0_THR='\n';
 137         UART0_THR='\r';
 138
 139         /* flush uart0 anyways */
 140         while(!(UART0_LSR&(1<<6)))
 141                 continue;
 142 }
 143
 144 void uart0_send_buf16(u16 *buf,int len) {
 145
 146         int i;
 147
 148         i=0;
 149
 150         for(i=0;i<len/2;i++) {
 151                 if(!(i%8))
 152                         while(!(UART0_LSR&(1<<6)))
 153                                 continue;
 154                 UART0_THR=buf[i]&0xff;
 155                 UART0_THR=(buf[i]>>8)&0xff;
 156         }
 157 }
 158
 159 void uart0_send_buf32(u32 *buf,int len) {
 160
 161         int i;
 162
 163         i=0;
 164
 165         for(i=0;i<len/4;i++) {
 166                 if(!(i%4))
 167                         while(!(UART0_LSR&(1<<6)))
 168                                 continue;
 169                 UART0_THR=buf[i]&0xff;
 170                 UART0_THR=(buf[i]>>8)&0xff;
 171                 UART0_THR=(buf[i]>>16)&0xff;
 172                 UART0_THR=(buf[i]>>24)&0xff;
 173         }
 174 }
 175
 176 void uart0_send_byte(u8 send) {
 177
 178         while(!(UART0_LSR&(1<<5)))
 179                 continue;
 180
 181         UART0_THR=send;
 182 }
 183
 184 u8 uart0_get_byte(void) {
 185
 186         u8 rx;
 187
 188         while(!(UART0_LSR&(1<<0)))
 189                 continue;
 190
 191         rx=UART0_RBR;
 192
 193         return rx;
 194 }
 195
 196 void flash_sector_erase(u8 flash,u8 sector) {
 197
 198         u32 a18_12;
 199         u32 base;
 200
 201         if(sector>18)
 202                 return;
 203         a18_12=sector_address[sector]<<1;
 204
 205         if((flash!='0')&(flash!='2'))
 206                 return;
 207
 208         switch(flash) {
 209                 case '0':
 210                         base=0x80000000;
 211                         B0F555=0xaa;
 212                         B0F2AA=0x55;
 213                         B0F555=0x80;
 214                         B0F555=0xaa;
 215                         B0F2AA=0x55;
 216                         *((volatile u16 *)(base|a18_12))=0x30;
 217                         break;
 218                 case '2':
 219                         base=0x82000000;
 220                         B2F555=0xaa;
 221                         B2F2AA=0x55;
 222                         B2F555=0x80;
 223                         B2F555=0xaa;
 224                         B2F2AA=0x55;
 225                         *((volatile u16 *)(base|a18_12))=0x30;
 226                         break;
 227                 default:
 228                         return;
 229         }
 230
 231         return;
 232 }
 233
 234 void flash_chip_erase(u8 bank) {
 235
 236         if((bank!='0')&(bank!='2'))
 237                 return;
 238
 239         if(bank=='0') {
 240                 B0F555=0xaa;
 241                 B0F2AA=0x55;
 242                 B0F555=0x80;
 243                 B0F555=0xaa;
 244                 B0F2AA=0x55;
 245                 B0F555=0x10;
 246         }
 247         else {
 248                 B2F555=0xaa;
 249                 B2F2AA=0x55;
 250                 B2F555=0x80;
 251                 B2F555=0xaa;
 252                 B2F2AA=0x55;
 253                 B2F555=0x10;
 254         }
 255 }
 256
 257 void unlock_bypass(u8 bank) {
 258
 259         if((bank!='0')&(bank!='2'))
 260                 return;
 261
 262         if(bank=='0') {
 263                 B0F555=0xaa;
 264                 B0F2AA=0x55;
 265                 B0F555=0x20;
 266         }
 267         else {
 268                 B2F555=0xaa;
 269                 B2F2AA=0x55;
 270                 B2F555=0x20;
 271         }
 272 }
 273
 274 void unlock_bypass_reset(u8 bank) {
 275
 276         if((bank!='0')&(bank!='2'))
 277                 return;
 278
 279         if(bank=='0') {
 280                 B0F=0x90;
 281                 B0F=0x00;
 282         }
 283         else {
 284                 B2F=0x90;
 285                 B2F=0x00;
 286         }
 287 }
 288
 289 void flash_write(u32 addr,u16 data) {
 290
 291         *((volatile unsigned short *)addr)=0xa0;
 292         *((volatile unsigned short *)addr)=data;
 293 }
 294
 295 void receive_data_and_write_to_flash(u32 addr,u32 datalen) {
 296
 297         u8 bank;
 298         u32 i;
 299         u16 data;
 300         u8 byte;
 301         u8 cksm;
 302
 303         /* which bank to program */
 304         if(addr<0x82000000)
 305                 bank='0';
 306         else
 307                 bank='2';
 308
 309         /* unlock bypass */
 310         unlock_bypass(bank);
 311
 312         /* receive and write data */
 313         cksm=0;
 314         for(i=0;i<datalen/2;i++) {
 315                 byte=uart0_get_byte();
 316                 data=byte;
 317                 cksm+=byte;
 318                 byte=uart0_get_byte();
 319                 cksm+=byte;
 320                 data|=byte<<8;
 321                 *((unsigned volatile short *)addr)=0xa0;
 322                 *((unsigned volatile short *)addr)=data;
 323                 addr+=2;
 324         }
 325
 326         /* relock bypass */
 327         unlock_bypass_reset(bank);
 328
 329         /* send an ack */
 330         uart0_send_byte(cksm);
 331 }
 332
 333 /*
 334  * main function
 335  */
 336
 337 int main(void) {
 338
 339         /* variables */
 340
 341         u32 i,addrlen,datalen,addr;
 342         u8 buf[BUFSIZE];
 343         u16 data;
 344         u8 cmd;
 345         u8 txrx;
 346
 347         /* memory mapping of interrupt vectors to static ram */
 348
 349         //mmap_init(MMAP_RAM);
 350
 351         /* pll initialization */
 352         pll_init();
 353
 354         /* uart initialization */
 355         uart0_init();
 356
 357         /* external memory init */
 358         ext_mem_bank_init();
 359
 360         /* pin select init */
 361         pin_select_init();
 362
 363         /* begin the main loop */
 364         while(1) {
 365
 366         /* receive cmd */
 367         while(1) {
 368
 369                 cmd=uart0_get_byte();
 370                 txrx=1;
 371                 switch(cmd) {
 372                         case CMD_CHIP_ERASE:
 373                                 addrlen=0;
 374                                 datalen=1;
 375                                 break;
 376                         case CMD_SECTOR_ERASE:
 377                                 addrlen=0;
 378                                 datalen=2;
 379                                 break;
 380                         case CMD_READ:
 381                                 addrlen=4;
 382                                 datalen=4;
 383                         case CMD_WRITE:
 384                                 addrlen=4;
 385                                 datalen=4;
 386                                 break;
 387                         case CMD_CHIP_ID:
 388                                 addrlen=0;
 389                                 datalen=1;
 390                                 break;
 391                         default:
 392                                 txrx=0;
 393                                 break;
 394                 }
 395
 396                 if(txrx)
 397                         break;
 398         }
 399
 400         /* receive (only if there is) more data from uart0 */
 401         addr=0;
 402         for(i=0;i<addrlen;i++) {
 403                 txrx=uart0_get_byte();
 404                 addr|=(txrx<<((addrlen-i-1)*8));
 405         }
 406
 407         for(i=0;i<datalen;i++)
 408                 buf[i]=uart0_get_byte();
 409
 410         /* process the cmd */
 411         switch(cmd) {
 412                 case CMD_SECTOR_ERASE:
 413                         flash_sector_erase(buf[0],buf[1]);
 414                         break;
 415                 case CMD_READ:
 416                         /* data length to read */
 417                         datalen=buf[0]<<24|buf[1]<<16|buf[2]<<8|buf[3];
 418                         /* check addr and datalen */
 419                         if((addr>=BANK0)&(addr+datalen<=BANK0+BANK_SIZE))
 420                                 uart0_send_buf16((u16 *)addr,datalen);
 421                         if((addr>=BANK2)&(addr+datalen<=BANK2+BANK_SIZE))
 422                                 uart0_send_buf16((u16 *)addr,datalen);
 423                         if((addr>=BOOTLOADER)&(addr+datalen<=BOOTLOADER+BL_SIZE))
 424                                 uart0_send_buf32((u32 *)addr,datalen);
 425                         break;
 426                 case CMD_WRITE:
 427                         /* data length */
 428                         datalen=buf[0]<<24|buf[1]<<16|buf[2]<<8|buf[3];
 429                         /* check addr and data len */
 430                         if(((addr>=BANK0)&(addr+datalen<=BANK0+BANK_SIZE))|
 431                            ((addr>=BANK2)&(addr+datalen<=BANK2+BANK_SIZE)))
 432                                 receive_data_and_write_to_flash(addr,datalen);
 433                         break;
 434                 case CMD_CHIP_ERASE:
 435                         flash_chip_erase(buf[0]);
 436                         break;
 437                 case CMD_CHIP_ID:
 438                         if(buf[0]=='0') {
 439                                 B0F555=0xaa;
 440                                 B0F2AA=0x55;
 441                                 B0F555=0x90;
 442                                 data=*((u16 *)BANK0);
 443                                 uart0_send_buf16(&data,2);
 444                                 data=*((u16 *)(BANK0|0x200));
 445                                 uart0_send_buf16(&data,2);
 446                         }
 447                         else if(buf[0]=='2') {
 448                                 B2F555=0xaa;
 449                                 B2F2AA=0x55;
 450                                 B2F555=0x90;
 451                                 data=*((u16 *)BANK2);
 452                                 uart0_send_buf16(&data,2);
 453                                 data=*((u16 *)(BANK2|0x200));
 454                                 uart0_send_buf16(&data,2);
 455                         }
 456                         break;
 457                 default:
 458                         break;
 459         }
 460
 461         }
 462
 463         return 0;
 464 }
 465