bullshit commit, sync for travel (to zn00H!) :)
[my-code/arm.git] / betty / system.c
1 /*
2  * system.c - misc system specific stuff
3  *
4  * author: hackbard@hackdaworld.org
5  *
6  */
7
8 #include "system.h"
9
10 /*
11  * functions
12  */
13
14 void pll_init(void) {
15
16         /* configuration */
17         PLLCFG=0x42;    // multiplier = 3 (for cclk), dividor = 4 (for f_cco)
18         PLLCON=0x03;    // enable and set as clk source for the lpc
19
20         /* feed sequence */
21         PLLFEED=0xaa;
22         PLLFEED=0x55;
23
24         /* wait for lock */
25         while(!(PLLSTAT&(1<<10)))
26                 continue;
27 }
28
29 void ext_mem_init(void) {
30
31         /*
32          * flash at bank0 and bank:
33          *
34          * idle clocks between rad & write: 0+1
35          * length of read access: 1+3
36          * bls lines high during write access
37          * length of write access: 0+extra
38          * no write protect, no burst-rom
39          * 16 bit data width
40          *
41          */
42
43         BCFG0=0x10000420;       // bank 0
44         BCFG2=0x10000420;       // bank 2
45
46         /*
47          * lcd at bank 1:
48          *
49          * idle clocks between rad & write: 2+1
50          * length of read access: 2+3
51          * bls lines low during write access
52          * length of write access: 1+extra
53          * no write protect, no burst-rom
54          * 8 bit data width
55          *
56          */
57
58         BCFG1=0x00000c42;       // bank 1
59 }
60
61 void pin_init(void) {
62
63         /*
64          * pinsel 0
65          *
66          * uart0: tx, rx
67          * p0.7: pwm2
68          * p0.11: gpio -> audio (leave as is)
69          *
70          */
71
72         PINSEL0=0x00008005;
73
74         /*
75          * pinsel 1
76          *
77          * p0.30: eint3
78          *
79          */
80
81         PINSEL1=0x20000000;
82
83         /*
84          * pin select 2
85          *
86          * orig fw ->    d    6    0    4    1    d    4
87          *            1101 0110 0000 0100 0001 1101 0100
88          *
89          * this fw ->    d    e    0    4    9    d    4
90          *            1101 1110 0000 0100 1001 1101 0100
91          *
92          * differences:
93          *
94          *   - p3.26 should be chip select for ext mem bank 1
95          *   - p3.0 should be address line 0
96          *
97          * explanation: maybe bcfg1 config implies these settings
98          *
99          */
100
101         //PINSEL2=0xd6041d4;
102         PINSEL2=0xde049d4;
103
104         /*
105          * gpio config
106          *
107          * buttons:
108          *
109          * out: p2.18 - p2.24 (+ pull high)
110          * in: p0.30, p0.{27,28}, p3.{20,21}, p0.22, p0.13
111          *
112          * audio:
113          *
114          * p0.11: out
115          *
116          */
117
118         //IODIR0=(1<<11);
119
120         // nothing to do for inputs (default: 0x00000000)
121         IODIR2=((1<<18)|(1<<19)|(1<<20)|(1<<21)|(1<<22)|(1<<23)|(1<<24));
122         IOSET2=((1<<18)|(1<<19)|(1<<20)|(1<<21)|(1<<22)|(1<<23)|(1<<24));
123 }
124
125 void mmap_init(u8 memtype) {
126
127         if(memtype==MEMTYPE_RESERVED)
128                 return;
129
130         MEMMAP=memtype;
131 }
132
133 void pause(u32 cnt) {
134
135         while(cnt--)
136                 //continue;
137                 asm volatile ("nop");
138 }
139