.def tmp1 = r16
.def tmp2 = r17
.def uart_rxtx = r18
-.def bcount = r19
-.def scount = r20
-.def data = r21
-.def state = r22
+.def count = r19
+.def state = r20
;
; interrupts
rjmp INIT
; INT0
-reti
+rjmp INT0_IR
; INT1
reti
reti
; T1 OVF1
-reti
+rjmp T1_OVF_IR
; T0 OVF0
-rjmp T0_OVF
+reti
; UART RX
-rjmp UART_RECEIVE
+reti
; UART UDRE
reti
; gio port init
rcall PORT_INIT
- ; timer0 init
- rcall TIMER0_INIT
+ ; timer1 init
+ rcall TIMER1_INIT
; uart init
rcall UART_INIT
out SPL,tmp1
; more init
- ldi bcount,0
- ldi scount,0
- ldi data,0x00
- ldi state,1
+ ldi count,0
+ ldi state,0
; storage pointer
ldi ZL,low(STORAGE)
ldi uart_rxtx,0x72
rcall UART_TX
+ ; external interrupt enable
+ rcall INT0_IR_CONF_INIT
+ rcall INT0_IR_ENABLE
+
; global interrupt enable
sei
MAIN:
-WAIT_FOR_HIGH:
-
- ; start as soon as we get a high signal
- in tmp1,PORTB
- sbrs tmp1,0
- rjmp WAIT_FOR_HIGH
-
- ; timer0 interrupt enable
- rcall TIMER0_INT_INIT
-
SAMPLE:
- ; sample as long as there is storage capacity
- sbrc state,0
- rjmp SAMPLE
+ ; sample as long as there is storage capacity and signal
+ cpi state,2
+ brne SAMPLE
- ; timer0 interrupt disable
- rcall TIMER0_INT_END
+ ; disable interrupts
+ rcall INT0_IR_DISABLE
+ rcall TIMER1_INT_DISABLE
; signal finish
ldi uart_rxtx,0x66
; reset storage pointer
ldi ZL,low(STORAGE)
ldi ZH,high(STORAGE)
- ldi scount,0
+ ldi tmp1,0
+
+ ; transmit number of sampled words
+ mov uart_rxtx,count
+ rcall UART_TX
TRANSFER_LOOP:
+ ; check amount of sent data
+ cp tmp1,count
+ breq IDLE
+
; transmit storage
ld uart_rxtx,Z+
rcall UART_TX
+ ld uart_rxtx,Z+
+ rcall UART_TX
; count sent data
- add scount,one
-
- ; check amount of sent data
- cpi scount,128
- breq IDLE
+ add tmp1,one
rjmp TRANSFER_LOOP
; interrupt routines
;
-T0_OVF:
+INT0_IR:
; debug output
; cbi PORTD,3
- ; read port
- in tmp1,PORTB
- sbrc tmp1,0
- add data,one
-
- ; increase and check bit counter
- add bcount,one
- cpi bcount,8
- brne EXIT_T0_OVF
-
- ; store another byte into sram
- st Z+,data
- ldi bcount,0
- add scount,one
+ ; get timer value
+ in tmp1,TCNT1L
+ in tmp2,TCNT1H
+
+ ; check for initial or running state
+ cpi state,0
+ brne INT0_RUN
+
+ ; configure interrupt for running state
+ rcall INT0_IR_CONF_RUN
+ ldi state,1
+
+ ; reset timer and start ovf interrupt
+ ldi tmp1,0
+ out TCNT1H,tmp1
+ out TCNT1L,tmp1
+ rcall TIMER1_INT_ENABLE
+
+ rjmp EXIT_IR
+
+INT0_RUN:
+
+ ; write timer value into sram
+ st Z+,tmp2
+ st Z+,tmp1
+
+ ; inc counter
+ add count,one
; check for left capacity
- cpi scount,128
- brne EXIT_T0_OVF
- ldi state,0
+ cpi count,55
+ brne EXIT_IR
+
+ ; indicate end of 'c'apacity
+ ldi uart_rxtx,0x63
+ rcall UART_TX
+
+ ; exit sampling
+ ldi state,2
+
+EXIT_IR:
; debug output
; sbi PORTD,3
-EXIT_T0_OVF:
-
- ; shift data bits
- ; in any case => there is always a zero at lsb
- lsl data
-
reti
-UART_RECEIVE:
+T1_OVF_IR:
+
+ ; indicate 'o'verflow end
+ ldi uart_rxtx,0x6f
+ rcall UART_TX
+
+ ; exit sampling
+ ldi state,2
reti
.dseg
-STORAGE: .byte 128
-
+STORAGE: .byte 110